[PATCH] D45563: [X86][AArch64][NFC] Add tests for masked merge unfolding

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 17 09:34:10 PDT 2018


spatel added a comment.

In https://reviews.llvm.org/D45563#1069922, @lebedev.ri wrote:

> In https://reviews.llvm.org/D45563#1069916, @spatel wrote:
>
> > Don't know what changes are planned here, but this is on the right track. We want to have coverage of the possible canonical IR variations for various targets.
>
>
> I'm working on that right now, got it working, maybe will update this + post the dagcombiner part (that is where i should have put it, right?) in a few hours.


Yes, this will be in DAGCombiner.

>> PowerPC with Altivec has a vsel instruction if you want even more coverage, but I don't think the PPC backend has the isel pattern-matching logic to produce that currently (cc @nemanjai).
> 
> Downside: i dropped vector tests for now, only only handle scalars for now.

That's actually preferred. Small steps - easier to review and fix when the bug reports come in. :)


Repository:
  rL LLVM

https://reviews.llvm.org/D45563





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