[llvm] r330109 - [X86] Introduce archs: goldmont-plus & tremont
Gabor Buella via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 16 00:47:35 PDT 2018
Author: gbuella
Date: Mon Apr 16 00:47:35 2018
New Revision: 330109
URL: http://llvm.org/viewvc/llvm-project?rev=330109&view=rev
Log:
[X86] Introduce archs: goldmont-plus & tremont
Using Goldmont's cost tables for these two upcoming
atom archs.
Reviewers: craig.topper
Reviewed By: craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45612
Modified:
llvm/trunk/include/llvm/Support/X86TargetParser.def
llvm/trunk/lib/Support/Host.cpp
llvm/trunk/lib/Target/X86/X86.td
llvm/trunk/lib/Target/X86/X86Subtarget.h
llvm/trunk/test/CodeGen/X86/cpus.ll
Modified: llvm/trunk/include/llvm/Support/X86TargetParser.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/X86TargetParser.def?rev=330109&r1=330108&r2=330109&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/X86TargetParser.def (original)
+++ llvm/trunk/include/llvm/Support/X86TargetParser.def Mon Apr 16 00:47:35 2018
@@ -65,6 +65,8 @@ X86_CPU_TYPE ("athlon-x
X86_CPU_TYPE ("k8", AMD_K8)
X86_CPU_TYPE ("k8-sse3", AMD_K8SSE3)
X86_CPU_TYPE ("goldmont", INTEL_GOLDMONT)
+X86_CPU_TYPE ("goldmont-plus", INTEL_GOLDMONT_PLUS)
+X86_CPU_TYPE ("tremont", INTEL_TREMONT)
#undef X86_CPU_TYPE_COMPAT_WITH_ALIAS
#undef X86_CPU_TYPE_COMPAT
#undef X86_CPU_TYPE
Modified: llvm/trunk/lib/Support/Host.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=330109&r1=330108&r2=330109&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Host.cpp (original)
+++ llvm/trunk/lib/Support/Host.cpp Mon Apr 16 00:47:35 2018
@@ -651,9 +651,11 @@ getIntelProcessorTypeAndSubtype(unsigned
// Goldmont:
case 0x5c: // Apollo Lake
case 0x5f: // Denverton
- case 0x7a: // Gemini Lake
*Type = X86::INTEL_GOLDMONT;
break; // "goldmont"
+ case 0x7a:
+ *Type = X86::INTEL_GOLDMONT_PLUS;
+ break;
case 0x57:
*Type = X86::INTEL_KNL; // knl
break;
Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=330109&r1=330108&r2=330109&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Mon Apr 16 00:47:35 2018
@@ -413,6 +413,10 @@ def ProcIntelSLM : SubtargetFeature<"sl
"Intel Silvermont processors">;
def ProcIntelGLM : SubtargetFeature<"glm", "X86ProcFamily", "IntelGLM",
"Intel Goldmont processors">;
+def ProcIntelGLP : SubtargetFeature<"glp", "X86ProcFamily", "IntelGLP",
+ "Intel Goldmont Plus processors">;
+def ProcIntelTRM : SubtargetFeature<"tremont", "X86ProcFamily", "IntelTRM",
+ "Intel Tremont processors">;
def ProcIntelHSW : SubtargetFeature<"haswell", "X86ProcFamily",
"IntelHaswell", "Intel Haswell processors">;
def ProcIntelBDW : SubtargetFeature<"broadwell", "X86ProcFamily",
@@ -564,8 +568,17 @@ class SilvermontProc<string Name> : Proc
def : SilvermontProc<"silvermont">;
def : SilvermontProc<"slm">; // Legacy alias.
-class GoldmontProc<string Name> : ProcessorModel<Name, SLMModel, [
- ProcIntelGLM,
+class ProcessorFeatures<list<SubtargetFeature> Inherited,
+ list<SubtargetFeature> NewFeatures> {
+ list<SubtargetFeature> Value = !listconcat(Inherited, NewFeatures);
+}
+
+class ProcModel<string Name, SchedMachineModel Model,
+ list<SubtargetFeature> ProcFeatures,
+ list<SubtargetFeature> OtherFeatures> :
+ ProcessorModel<Name, Model, !listconcat(ProcFeatures, OtherFeatures)>;
+
+def GLMFeatures : ProcessorFeatures<[], [
FeatureX87,
FeatureMMX,
FeatureSSE42,
@@ -592,8 +605,29 @@ class GoldmontProc<string Name> : Proces
FeatureCLFLUSHOPT,
FeatureFSGSBase
]>;
+
+class GoldmontProc<string Name> : ProcModel<Name, SLMModel,
+ GLMFeatures.Value, [ ProcIntelGLM ]>;
def : GoldmontProc<"goldmont">;
+class GoldmontPlusProc<string Name> : ProcModel<Name, SLMModel,
+ GLMFeatures.Value, [
+ ProcIntelGLP,
+ FeatureRDPID,
+ FeatureSGX
+]>;
+def : GoldmontPlusProc<"goldmont-plus">;
+
+class TremontProc<string Name> : ProcModel<Name, SLMModel,
+ GLMFeatures.Value, [
+ ProcIntelTRM,
+ FeatureCLDEMOTE,
+ FeatureGFNI,
+ FeatureRDPID,
+ FeatureSGX
+]>;
+def : TremontProc<"tremont">;
+
// "Arrandale" along with corei3 and corei5
class NehalemProc<string Name> : ProcessorModel<Name, SandyBridgeModel, [
FeatureX87,
@@ -626,16 +660,6 @@ class WestmereProc<string Name> : Proces
]>;
def : WestmereProc<"westmere">;
-class ProcessorFeatures<list<SubtargetFeature> Inherited,
- list<SubtargetFeature> NewFeatures> {
- list<SubtargetFeature> Value = !listconcat(Inherited, NewFeatures);
-}
-
-class ProcModel<string Name, SchedMachineModel Model,
- list<SubtargetFeature> ProcFeatures,
- list<SubtargetFeature> OtherFeatures> :
- ProcessorModel<Name, Model, !listconcat(ProcFeatures, OtherFeatures)>;
-
// SSE is not listed here since llvm treats AVX as a reimplementation of SSE,
// rather than a superset.
def SNBFeatures : ProcessorFeatures<[], [
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=330109&r1=330108&r2=330109&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h Mon Apr 16 00:47:35 2018
@@ -56,6 +56,8 @@ public:
IntelAtom,
IntelSLM,
IntelGLM,
+ IntelGLP,
+ IntelTRM,
IntelHaswell,
IntelBroadwell,
IntelSkylake,
@@ -660,7 +662,11 @@ public:
/// TODO: to be removed later and replaced with suitable properties
bool isAtom() const { return X86ProcFamily == IntelAtom; }
bool isSLM() const { return X86ProcFamily == IntelSLM; }
- bool isGLM() const { return X86ProcFamily == IntelGLM; }
+ bool isGLM() const {
+ return X86ProcFamily == IntelGLM ||
+ X86ProcFamily == IntelGLP ||
+ X86ProcFamily == IntelTRM;
+ }
bool useSoftFloat() const { return UseSoftFloat; }
/// Use mfence if we have SSE2 or we're on x86-64 (even if we asked for
Modified: llvm/trunk/test/CodeGen/X86/cpus.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cpus.ll?rev=330109&r1=330108&r2=330109&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cpus.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cpus.ll Mon Apr 16 00:47:35 2018
@@ -53,6 +53,8 @@
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=silvermont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=slm 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=goldmont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=goldmont-plus 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=tremont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=knl 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=knm 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
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