[PATCH] D45631: [InstCombine] Simplify 'xor'/'add' to 'or' if no common bits are set.
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 15 11:35:45 PDT 2018
lebedev.ri added a comment.
In https://reviews.llvm.org/D45631#1068338, @spatel wrote:
> LGTM.
Thank you for the review!
> Note that for the value tracking improvement, there are a couple of other passes (that I've never looked at) that use haveNoCommonBitsSet(). If it's possible to show a test improvement from this change for those passes, that would be nice.
There seem to be two other users:
1. `ConstantOffsetExtractor::CanTraceInto()`, (`llvm/test/CodeGen/AArch64/aarch64-gep-opt.ll`, `@test-struct_1`) That use does not appear to be covered by any tests at all (at least with x86/aarch64 backends). Will add FIXME comment.
2. `StraightLineStrengthReduce::allocateCandidatesAndFindBasisForMul()`, (`test/Transforms/StraightLineStrengthReduce/slsr-mul.ll`, `@or`) It requires a `value` and a constant. So i'm also not sure i can show the effect there...
> Also note that SelectionDAG has a twin for llvm::haveNoCommonBitsSet(), so it would be good to add a 'TODO' there about the potential improvement and referencing the IR version of the code.
Sure thing, will do.
> If you have the C++ template skills to unify any of that code, that would be a great maintenance improvement.
Interesting, but will require tests, again, so i don't feel confident looking into it right now.
Repository:
rL LLVM
https://reviews.llvm.org/D45631
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