[PATCH] D41949: [RISCV] implement li pseudo instruction

[Mario Werner via Phabricator via llvm-commits]

niosHD updated this revision to Diff 142385.
niosHD added a comment.

Rebased on master as Mandeep requested  via email .

Currently there are two open "problems" with this patch:

1. The `doPeepholeLoadStoreADDI` peephole optimisation can currently not deal with the PseudoLI instruction which results in the codegen regression that Alex already detected (see `test/CodeGen/RISCV/mem.ll`, `test/CodeGen/RISCV/fload-mem.ll`, `test/CodeGen/RISCV/double-mem.ll`). I am not sure yet if it is better to extend the current optimisation or to introduce a new one given that it requires to update the memory instruction as well as the PseudoLI instruction.
2. The compression support, that was in the meantime landed, is not yet integrated into the `RISCVMCPseudoExpansion`. I did a quick experiment and it seems to be easy though. Should I add it to this patch or post a new one?

Best,
Mario


https://reviews.llvm.org/D41949

Files:
  lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  lib/Target/RISCV/MCTargetDesc/CMakeLists.txt
  lib/Target/RISCV/MCTargetDesc/RISCVMCPseudoExpansion.cpp
  lib/Target/RISCV/MCTargetDesc/RISCVMCPseudoExpansion.h
  lib/Target/RISCV/RISCVAsmPrinter.cpp
  lib/Target/RISCV/RISCVInstrFormats.td
  lib/Target/RISCV/RISCVInstrInfo.cpp
  lib/Target/RISCV/RISCVInstrInfo.td
  test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
  test/CodeGen/RISCV/calling-conv.ll
  test/CodeGen/RISCV/double-mem.ll
  test/CodeGen/RISCV/float-arith.ll
  test/CodeGen/RISCV/float-mem.ll
  test/CodeGen/RISCV/mem.ll
  test/CodeGen/RISCV/vararg.ll
  test/MC/RISCV/rv32i-aliases-invalid.s
  test/MC/RISCV/rv32i-aliases-valid.s
  test/MC/RISCV/rv64i-aliases-invalid.s
  test/MC/RISCV/rv64i-aliases-valid.s
  test/MC/RISCV/rvi-aliases-valid.s

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