[PATCH] D45514: [NEON] Support intrinsic for scalar and vector versions of the VRINTN instruction

Ivan Kosarev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 13 05:48:26 PDT 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL330011: [NEON] Support intrinsic for scalar and vector versions of the VRINTN… (authored by kosarev, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D45514?vs=142150&id=142387#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D45514

Files:
  llvm/trunk/include/llvm/IR/IntrinsicsARM.td
  llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
  llvm/trunk/test/CodeGen/ARM/vrint.ll


Index: llvm/trunk/include/llvm/IR/IntrinsicsARM.td
===================================================================
--- llvm/trunk/include/llvm/IR/IntrinsicsARM.td
+++ llvm/trunk/include/llvm/IR/IntrinsicsARM.td
@@ -369,6 +369,10 @@
   : Intrinsic<[llvm_anyvector_ty],
               [LLVMMatchType<0>, LLVMTruncatedType<0>, LLVMTruncatedType<0>],
               [IntrNoMem]>;
+
+class Neon_1FloatArg_Intrinsic
+  : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
+
 class Neon_CvtFxToFP_Intrinsic
   : Intrinsic<[llvm_anyfloat_ty], [llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>;
 class Neon_CvtFPToFx_Intrinsic
@@ -591,8 +595,8 @@
 def int_arm_neon_vtbx3 : Neon_Tbl5Arg_Intrinsic;
 def int_arm_neon_vtbx4 : Neon_Tbl6Arg_Intrinsic;
 
-// Vector Rounding
-def int_arm_neon_vrintn : Neon_1Arg_Intrinsic;
+// Vector and Scalar Rounding.
+def int_arm_neon_vrintn : Neon_1FloatArg_Intrinsic;
 def int_arm_neon_vrintx : Neon_1Arg_Intrinsic;
 def int_arm_neon_vrinta : Neon_1Arg_Intrinsic;
 def int_arm_neon_vrintz : Neon_1Arg_Intrinsic;
Index: llvm/trunk/test/CodeGen/ARM/vrint.ll
===================================================================
--- llvm/trunk/test/CodeGen/ARM/vrint.ll
+++ llvm/trunk/test/CodeGen/ARM/vrint.ll
@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=armv8 -mattr=+neon %s -o - | FileCheck %s
+
+declare float @llvm.arm.neon.vrintn.f32(float) nounwind readnone
+
+; CHECK-LABEL: vrintn_f32:
+; CHECK: vrintn.f32
+define float @vrintn_f32(float* %A) nounwind {
+  %tmp1 = load float, float* %A
+  %tmp2 = call float @llvm.arm.neon.vrintn.f32(float %tmp1)
+  ret float %tmp2
+}
Index: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
+++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
@@ -977,7 +977,7 @@
 }
 
 defm VRINTA : vrint_inst_anpm<"a", 0b00, fround>;
-defm VRINTN : vrint_inst_anpm<"n", 0b01>;
+defm VRINTN : vrint_inst_anpm<"n", 0b01, int_arm_neon_vrintn>;
 defm VRINTP : vrint_inst_anpm<"p", 0b10, fceil>;
 defm VRINTM : vrint_inst_anpm<"m", 0b11, ffloor>;
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D45514.142387.patch
Type: text/x-patch
Size: 2097 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180413/3aca9fff/attachment.bin>


More information about the llvm-commits mailing list