[llvm] r329992 - [X86] Introduce cldemote instruction
Gabor Buella via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 13 00:35:08 PDT 2018
Author: gbuella
Date: Fri Apr 13 00:35:08 2018
New Revision: 329992
URL: http://llvm.org/viewvc/llvm-project?rev=329992&view=rev
Log:
[X86] Introduce cldemote instruction
Hint to hardware to move the cache line containing the
address to a more distant level of the cache without
writing back to memory.
Reviewers: craig.topper, zvi
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D45256
Added:
llvm/trunk/test/CodeGen/X86/cldemote-intrinsic.ll
Modified:
llvm/trunk/include/llvm/IR/IntrinsicsX86.td
llvm/trunk/lib/Support/Host.cpp
llvm/trunk/lib/Target/X86/X86.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86Subtarget.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.h
llvm/trunk/test/MC/Disassembler/X86/x86-32.txt
llvm/trunk/test/MC/Disassembler/X86/x86-64.txt
llvm/trunk/test/MC/X86/x86-32-coverage.s
llvm/trunk/test/MC/X86/x86-64.s
Modified: llvm/trunk/include/llvm/IR/IntrinsicsX86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=329992&r1=329991&r2=329992&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IR/IntrinsicsX86.td (original)
+++ llvm/trunk/include/llvm/IR/IntrinsicsX86.td Fri Apr 13 00:35:08 2018
@@ -6394,3 +6394,11 @@ let TargetPrefix = "x86" in {
def int_x86_wbnoinvd : GCCBuiltin<"__builtin_ia32_wbnoinvd">,
Intrinsic<[], [], []>;
}
+
+//===----------------------------------------------------------------------===//
+// Cache-line demote
+
+let TargetPrefix = "x86" in {
+ def int_x86_cldemote : GCCBuiltin<"__builtin_ia32_cldemote">,
+ Intrinsic<[], [llvm_ptr_ty], []>;
+}
Modified: llvm/trunk/lib/Support/Host.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=329992&r1=329991&r2=329992&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Host.cpp (original)
+++ llvm/trunk/lib/Support/Host.cpp Fri Apr 13 00:35:08 2018
@@ -1257,6 +1257,7 @@ bool sys::getHostCPUFeatures(StringMap<b
Features["avx512bitalg"] = HasLeaf7 && ((ECX >> 12) & 1) && HasAVX512Save;
Features["avx512vpopcntdq"] = HasLeaf7 && ((ECX >> 14) & 1) && HasAVX512Save;
Features["rdpid"] = HasLeaf7 && ((ECX >> 22) & 1);
+ Features["cldemote"] = HasLeaf7 && ((ECX >> 25) & 1);
Features["ibt"] = HasLeaf7 && ((EDX >> 20) & 1);
Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=329992&r1=329991&r2=329992&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Fri Apr 13 00:35:08 2018
@@ -230,6 +230,8 @@ def FeatureMWAITX : SubtargetFeature<"m
"Enable MONITORX/MWAITX timer functionality">;
def FeatureCLZERO : SubtargetFeature<"clzero", "HasCLZERO", "true",
"Enable Cache Line Zero">;
+def FeatureCLDEMOTE : SubtargetFeature<"cldemote", "HasCLDEMOTE", "true",
+ "Enable Cache Demote">;
def FeatureMPX : SubtargetFeature<"mpx", "HasMPX", "true",
"Support MPX instructions">;
def FeatureLEAForSP : SubtargetFeature<"lea-sp", "UseLeaForSP", "true",
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=329992&r1=329991&r2=329992&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Fri Apr 13 00:35:08 2018
@@ -881,6 +881,7 @@ def HasPREFETCHWT1 : Predicate<"Subtarge
def HasLAHFSAHF : Predicate<"Subtarget->hasLAHFSAHF()">;
def HasMWAITX : Predicate<"Subtarget->hasMWAITX()">;
def HasCLZERO : Predicate<"Subtarget->hasCLZERO()">;
+def HasCLDEMOTE : Predicate<"Subtarget->hasCLDEMOTE()">;
def FPStackf32 : Predicate<"!Subtarget->hasSSE1()">;
def FPStackf64 : Predicate<"!Subtarget->hasSSE2()">;
def HasMPX : Predicate<"Subtarget->hasMPX()">;
@@ -2705,6 +2706,9 @@ let Predicates = [HasCLWB], SchedRW = [W
def CLWB : I<0xAE, MRM6m, (outs), (ins i8mem:$src), "clwb\t$src",
[(int_x86_clwb addr:$src)]>, PD;
+def CLDEMOTE : I<0x1C, MRM0m, (outs), (ins i8mem:$src), "cldemote\t$src",
+ [(int_x86_cldemote addr:$src)]>, TB, Requires<[HasCLDEMOTE]>;
+
//===----------------------------------------------------------------------===//
// Subsystems.
//===----------------------------------------------------------------------===//
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=329992&r1=329991&r2=329992&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Fri Apr 13 00:35:08 2018
@@ -318,6 +318,7 @@ void X86Subtarget::initializeEnvironment
HasLAHFSAHF = false;
HasMWAITX = false;
HasCLZERO = false;
+ HasCLDEMOTE = false;
HasMPX = false;
HasSHSTK = false;
HasIBT = false;
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=329992&r1=329991&r2=329992&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h Fri Apr 13 00:35:08 2018
@@ -205,6 +205,9 @@ protected:
/// Processor has Cache Line Zero instruction
bool HasCLZERO;
+ /// Processor has Cache Line Demote instruction
+ bool HasCLDEMOTE;
+
/// Processor has Prefetch with intent to Write instruction
bool HasPREFETCHWT1;
@@ -577,6 +580,7 @@ public:
bool hasLAHFSAHF() const { return HasLAHFSAHF; }
bool hasMWAITX() const { return HasMWAITX; }
bool hasCLZERO() const { return HasCLZERO; }
+ bool hasCLDEMOTE() const { return HasCLDEMOTE; }
bool isSHLDSlow() const { return IsSHLDSlow; }
bool isPMULLDSlow() const { return IsPMULLDSlow; }
bool isUnalignedMem16Slow() const { return IsUAMem16Slow; }
Added: llvm/trunk/test/CodeGen/X86/cldemote-intrinsic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cldemote-intrinsic.ll?rev=329992&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cldemote-intrinsic.ll (added)
+++ llvm/trunk/test/CodeGen/X86/cldemote-intrinsic.ll Fri Apr 13 00:35:08 2018
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=+cldemote | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=i386-pc-linux -mattr=+cldemote | FileCheck %s --check-prefix=X32
+
+define void @test_cldemote(i8* %p) {
+; X64-LABEL: test_cldemote:
+; X64: # %bb.0: # %entry
+; X64-NEXT: cldemote (%rdi)
+; X64-NEXT: retq
+;
+; X32-LABEL: test_cldemote:
+; X32: # %bb.0: # %entry
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: cldemote (%eax)
+; X32-NEXT: retl
+entry:
+ tail call void @llvm.x86.cldemote(i8* %p)
+ ret void
+}
+
+declare void @llvm.x86.cldemote(i8*)
Modified: llvm/trunk/test/MC/Disassembler/X86/x86-32.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-32.txt?rev=329992&r1=329991&r2=329992&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-32.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-32.txt Fri Apr 13 00:35:08 2018
@@ -823,3 +823,9 @@
# CHECK: wbnoinvd
0xf3 0x0f 0x09
+
+# CHECK: cldemote 4(%eax)
+0x0f 0x1c 0x40 0x04
+
+# CHECK: cldemote -559038737(%ebx,%ecx,8)
+0x0f,0x1c,0x84,0xcb,0xef,0xbe,0xad,0xde
Modified: llvm/trunk/test/MC/Disassembler/X86/x86-64.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-64.txt?rev=329992&r1=329991&r2=329992&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-64.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-64.txt Fri Apr 13 00:35:08 2018
@@ -519,3 +519,9 @@
# CHECK: wbnoinvd
0xf3 0x0f 0x09
+
+# CHECK: cldemote 4(%rax)
+0x0f 0x1c 0x40 0x04
+
+# CHECK: cldemote -559038737(%rbx,%rcx,8)
+0x0f,0x1c,0x84,0xcb,0xef,0xbe,0xad,0xde
Modified: llvm/trunk/test/MC/X86/x86-32-coverage.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32-coverage.s?rev=329992&r1=329991&r2=329992&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-32-coverage.s (original)
+++ llvm/trunk/test/MC/X86/x86-32-coverage.s Fri Apr 13 00:35:08 2018
@@ -10745,3 +10745,10 @@ btcl $4, (%eax)
// CHECK: encoding: [0xf0,0x01,0x37]
lock add %esi, (%edi)
+// CHECK: cldemote 4(%eax)
+// CHECK: encoding: [0x0f,0x1c,0x40,0x04]
+ cldemote 4(%eax)
+
+// CHECK: cldemote 3735928559(%ebx,%ecx,8)
+// CHECK: encoding: [0x0f,0x1c,0x84,0xcb,0xef,0xbe,0xad,0xde]
+ cldemote 0xdeadbeef(%ebx,%ecx,8)
Modified: llvm/trunk/test/MC/X86/x86-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64.s?rev=329992&r1=329991&r2=329992&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64.s (original)
+++ llvm/trunk/test/MC/X86/x86-64.s Fri Apr 13 00:35:08 2018
@@ -1563,6 +1563,14 @@ ptwriteq %rax
// CHECK: encoding: [0xf3,0x0f,0x09]
wbnoinvd
+// CHECK: cldemote 4(%rax)
+// CHECK: encoding: [0x0f,0x1c,0x40,0x04]
+cldemote 4(%rax)
+
+// CHECK: cldemote 3735928559(%rbx,%rcx,8)
+// CHECK: encoding: [0x0f,0x1c,0x84,0xcb,0xef,0xbe,0xad,0xde]
+cldemote 0xdeadbeef(%rbx,%rcx,8)
+
// __asm __volatile(
// "pushf \n\t"
// "popf \n\t"
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