[PATCH] D45432: [AArch64][SVE] Asm: Support for contiguous ST1 (scalar+imm) store instructions.
Renato Golin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 12 09:21:15 PDT 2018
rengolin added inline comments.
================
Comment at: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:3121
+ // See if this is a "mul vl" decoration used by SVE instructions.
+ if (!parseOptionalMulVl(Operands))
+ return false;
----------------
So mul vl is exclusive with shift or extend? I ask because you return if you find it.
https://reviews.llvm.org/D45432
More information about the llvm-commits
mailing list