[PATCH] D45395: [RISCV] Implement tail call optimization
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 12 06:34:27 PDT 2018
asb added inline comments.
================
Comment at: lib/Target/RISCV/RISCVISelLowering.cpp:787
+ // The callee has to preserve all registers the caller needs to preserve.
+ const RISCVRegisterInfo *TRI = Subtarget.getRegisterInfo();
+ const uint32_t *CallerPreserved = TRI->getCallPreservedMask(MF, CallerCC);
----------------
mgrang wrote:
> TODO: I couldn't write a test case to simulate this.
>
> @asb What calling convention could result in a difference between caller and callee saved regs?
Right now, the calling convention is always the same so this isn't testable. It's helpful to be future-proof though.
Repository:
rL LLVM
https://reviews.llvm.org/D45395
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