[PATCH] D45204: [X86][MIPS][ARM] New machine instruction property 'isMoveReg'

[Nikola Prica via Phabricator via llvm-commits]

NikolaPrica added inline comments.


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Comment at: lib/Target/ARM/ARMInstrVFP.td:1027
+let isMoveReg = 1 in {
 def VMOVRS : AVConv2I<0b11100001, 0b1010,
                       (outs GPR:$Rt), (ins SPR:$Sn),
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efriedma wrote:
> NikolaPrica wrote:
> > efriedma wrote:
> > > We usually use VMOVRRD (which moves two 32-bit integers into one 64-bit register) rather than VMOVRS; is there some way you can treat that as a "copy"?
> > There is similar instruction for MIPS that I've covered. On MIPS architecture similar instruction is used to transfer function arguments that were previously held in 32-bit register but for purpouse of call are transfered into 64-bit.  I think that it should be treated as copy?
> Not sure how the target-independent code will understand the semantics for a "move" with multiple inputs, but I'll let you figure that out, I guess.
In following patch new destination register is recognized as one that is marked as <def> and the source register is recognized only if it is marked as <killed>. Do you think that this will be enough?


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Comment at: lib/Target/X86/X86InstrAVX512.td:3323
                                   SDPatternOperator SelectOprr = vselect> {
-  let Predicates = [prd] in
   defm Z : avx512_load<opc, OpcodeStr, SSE_MOVU, _.info512, _.info512.LdFrag,
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craig.topper wrote:
> Why was this line deleted?
Oh, this got here by mistake. I've overlooked it.


https://reviews.llvm.org/D45204