[PATCH] D45431: [AArch64][SVE] Asm: Add support for parsing and printing SVE vector lists.
Florian Hahn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 12 05:27:34 PDT 2018
fhahn added inline comments.
================
Comment at: lib/Target/AArch64/AArch64RegisterInfo.td:839
+
+let Namespace="AArch64" in {
+ def zsub0 : SubRegIndex<128, -1>;
----------------
nit: spaces around = ?
================
Comment at: lib/Target/AArch64/AArch64RegisterInfo.td:841
+ def zsub0 : SubRegIndex<128, -1>;
+ def zsub1 : SubRegIndex<128, -1>;
+ def zsub2 : SubRegIndex<128, -1>;
----------------
zsub1...3 do not seem used?
================
Comment at: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:1155
+ AArch64::Q0_Q1_Q2, AArch64::Q0_Q1_Q2_Q3 },
+ /* ZReg */ { AArch64::Z0,
+ AArch64::Z0 }
----------------
Could only initializing the first 2 elements for the ZRegs cause problems? Maybe assert that NumRegs < 2m uf RegTz == ZReg?
https://reviews.llvm.org/D45431
More information about the llvm-commits
mailing list