[llvm] r329834 - [X86] Generalize X86PadShortFunction to work with TargetSchedModel
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 11 11:05:17 PDT 2018
Author: rksimon
Date: Wed Apr 11 11:05:17 2018
New Revision: 329834
URL: http://llvm.org/viewvc/llvm-project?rev=329834&view=rev
Log:
[X86] Generalize X86PadShortFunction to work with TargetSchedModel
Pre-commit for D45486, don't rely on itinerary scheduler model to determine latencies for padding, use the generic TargetSchedModel::computeInstrLatency call.
Also, replace hard coded (atom specific) 2*uop creation per padding cycle with a version based on the scheduler model's issue width.
Differential Revision: https://reviews.llvm.org/D45486
Modified:
llvm/trunk/lib/Target/X86/X86PadShortFunction.cpp
Modified: llvm/trunk/lib/Target/X86/X86PadShortFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86PadShortFunction.cpp?rev=329834&r1=329833&r2=329834&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86PadShortFunction.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86PadShortFunction.cpp Wed Apr 11 11:05:17 2018
@@ -21,7 +21,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/Passes.h"
-#include "llvm/CodeGen/TargetInstrInfo.h"
+#include "llvm/CodeGen/TargetSchedule.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
@@ -49,7 +49,7 @@ namespace {
struct PadShortFunc : public MachineFunctionPass {
static char ID;
PadShortFunc() : MachineFunctionPass(ID)
- , Threshold(4), STI(nullptr), TII(nullptr) {}
+ , Threshold(4) {}
bool runOnMachineFunction(MachineFunction &MF) override;
@@ -82,8 +82,7 @@ namespace {
// VisitedBBs - Cache of previously visited BBs.
DenseMap<MachineBasicBlock*, VisitedBBInfo> VisitedBBs;
- const X86Subtarget *STI;
- const TargetInstrInfo *TII;
+ TargetSchedModel TSM;
};
char PadShortFunc::ID = 0;
@@ -99,15 +98,13 @@ bool PadShortFunc::runOnMachineFunction(
if (skipFunction(MF.getFunction()))
return false;
- if (MF.getFunction().optForSize()) {
+ if (MF.getFunction().optForSize())
return false;
- }
- STI = &MF.getSubtarget<X86Subtarget>();
- if (!STI->padShortFunctions())
+ if (!MF.getSubtarget<X86Subtarget>().padShortFunctions())
return false;
- TII = STI->getInstrInfo();
+ TSM.init(&MF.getSubtarget());
// Search through basic blocks and mark the ones that have early returns
ReturnBBs.clear();
@@ -195,7 +192,7 @@ bool PadShortFunc::cyclesUntilReturn(Mac
return true;
}
- CyclesToEnd += TII->getInstrLatency(STI->getInstrItineraryData(), MI);
+ CyclesToEnd += TSM.computeInstrLatency(&MI);
}
VisitedBBs[MBB] = VisitedBBInfo(false, CyclesToEnd);
@@ -209,9 +206,8 @@ void PadShortFunc::addPadding(MachineBas
MachineBasicBlock::iterator &MBBI,
unsigned int NOOPsToAdd) {
DebugLoc DL = MBBI->getDebugLoc();
+ unsigned IssueWidth = TSM.getIssueWidth();
- while (NOOPsToAdd-- > 0) {
- BuildMI(*MBB, MBBI, DL, TII->get(X86::NOOP));
- BuildMI(*MBB, MBBI, DL, TII->get(X86::NOOP));
- }
+ for (unsigned i = 0, e = IssueWidth * NOOPsToAdd; i != e; ++i)
+ BuildMI(*MBB, MBBI, DL, TSM.getInstrInfo()->get(X86::NOOP));
}
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