[PATCH] D45486: [X86][Atom] Convert Atom scheduler model to SchedRW (PR32431)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: test/CodeGen/X86/sse-schedule.ll:6135
 ; ATOM-NEXT:    nop # sched: [1:0.50]
-; ATOM-NEXT:    nop # sched: [1:0.50]
-; ATOM-NEXT:    nop # sched: [1:0.50]
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craig.topper wrote:
> Why did the number of nops change?
The actual test nop is inside an inlineasm, which can't be scheduled. Itineraries' getInstrLatency default to 0cy, but TargetSchedModel::computeInstrLatency defaults to 1cy.

TBH in this case, I think the schedrw is slightly better but only by chance.


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Comment at: test/CodeGen/X86/sse2-schedule.ll:10709
-; ATOM-NEXT:    paddw %xmm0, %xmm1 # sched: [1:0.50]
-; ATOM-NEXT:    movdqa %xmm1, %xmm0 # sched: [1:0.50]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
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craig.topper wrote:
> Any idea why the paddw wasn't commuted before to make the movdqa unnecessary?
Sorry, no - with the patch MachineCSE is performing the commute.


Repository:
  rL LLVM

https://reviews.llvm.org/D45486