[llvm] r329620 - AMDGPU: Remove max_scratch_backing_memory_byte_size from kernel header
Konstantin Zhuravlyov via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 9 13:47:22 PDT 2018
Author: kzhuravl
Date: Mon Apr 9 13:47:22 2018
New Revision: 329620
URL: http://llvm.org/viewvc/llvm-project?rev=329620&view=rev
Log:
AMDGPU: Remove max_scratch_backing_memory_byte_size from kernel header
1. Remove max_scratch_backing_memory_byte_size from kernel header
2. Make it a reserved field
3. Ignore it while parsing assembly for backwards compatibility
4. Bump up minor version of kernel header
Differential Revision: https://reviews.llvm.org/D45452
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDKernelCodeT.h
llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/trunk/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h
llvm/trunk/test/MC/AMDGPU/hsa-exp.s
llvm/trunk/test/MC/AMDGPU/hsa.s
Modified: llvm/trunk/lib/Target/AMDGPU/AMDKernelCodeT.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDKernelCodeT.h?rev=329620&r1=329619&r2=329620&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDKernelCodeT.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDKernelCodeT.h Mon Apr 9 13:47:22 2018
@@ -551,14 +551,8 @@ typedef struct amd_kernel_code_s {
int64_t kernel_code_prefetch_byte_offset;
uint64_t kernel_code_prefetch_byte_size;
- /// Number of bytes of scratch backing memory required for full
- /// occupancy of target chip. This takes into account the number of
- /// bytes of scratch per work-item, the wavefront size, the maximum
- /// number of wavefronts per CU, and the number of CUs. This is an
- /// upper limit on scratch. If the grid being dispatched is small it
- /// may only need less than this. If the kernel uses no scratch, or
- /// the Finalizer has not computed this value, it must be 0.
- uint64_t max_scratch_backing_memory_byte_size;
+ /// Reserved. Must be 0.
+ uint64_t reserved0;
/// Shader program settings for CS. Contains COMPUTE_PGM_RSRC1 and
/// COMPUTE_PGM_RSRC2 registers.
Modified: llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp?rev=329620&r1=329619&r2=329620&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp Mon Apr 9 13:47:22 2018
@@ -2608,6 +2608,13 @@ bool AMDGPUAsmParser::ParseDirectiveHSAC
bool AMDGPUAsmParser::ParseAMDKernelCodeTValue(StringRef ID,
amd_kernel_code_t &Header) {
+ // max_scratch_backing_memory_byte_size is deprecated. Ignore it while parsing
+ // assembly for backwards compatibility.
+ if (ID == "max_scratch_backing_memory_byte_size") {
+ Parser.eatToEndOfStatement();
+ return false;
+ }
+
SmallString<40> ErrStr;
raw_svector_ostream Err(ErrStr);
if (!parseAmdKernelCodeField(ID, getParser(), Header, Err)) {
Modified: llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp?rev=329620&r1=329619&r2=329620&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp Mon Apr 9 13:47:22 2018
@@ -423,7 +423,7 @@ void initDefaultAMDKernelCodeT(amd_kerne
memset(&Header, 0, sizeof(Header));
Header.amd_kernel_code_version_major = 1;
- Header.amd_kernel_code_version_minor = 1;
+ Header.amd_kernel_code_version_minor = 2;
Header.amd_machine_kind = 1; // AMD_MACHINE_KIND_AMDGPU
Header.amd_machine_version_major = ISA.Major;
Header.amd_machine_version_minor = ISA.Minor;
Modified: llvm/trunk/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h?rev=329620&r1=329619&r2=329620&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h Mon Apr 9 13:47:22 2018
@@ -73,7 +73,6 @@ FIELD2(amd_machine_version_stepping, ma
FIELD(kernel_code_entry_byte_offset),
FIELD(kernel_code_prefetch_byte_size),
-FIELD(max_scratch_backing_memory_byte_size),
COMPPGM1(granulated_workitem_vgpr_count, compute_pgm_rsrc1_vgprs, VGPRS),
COMPPGM1(granulated_wavefront_sgpr_count, compute_pgm_rsrc1_sgprs, SGPRS),
Modified: llvm/trunk/test/MC/AMDGPU/hsa-exp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/hsa-exp.s?rev=329620&r1=329619&r2=329620&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/hsa-exp.s (original)
+++ llvm/trunk/test/MC/AMDGPU/hsa-exp.s Mon Apr 9 13:47:22 2018
@@ -65,14 +65,13 @@ amd_kernel_code_t_minimal:
// ASM-LABEL: {{^}}amd_kernel_code_t_minimal:
// ASM: .amd_kernel_code_t
// ASM: amd_code_version_major = 7
-// ASM: amd_code_version_minor = 1
+// ASM: amd_code_version_minor = 2
// ASM: amd_machine_kind = 1
// ASM: amd_machine_version_major = 7
// ASM: amd_machine_version_minor = 0
// ASM: amd_machine_version_stepping = 0
// ASM: kernel_code_entry_byte_offset = 256
// ASM: kernel_code_prefetch_byte_size = 0
-// ASM: max_scratch_backing_memory_byte_size = 0
// ASM: granulated_workitem_vgpr_count = 1
// ASM: granulated_wavefront_sgpr_count = 1
// ASM: priority = 0
Modified: llvm/trunk/test/MC/AMDGPU/hsa.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/hsa.s?rev=329620&r1=329619&r2=329620&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/hsa.s (original)
+++ llvm/trunk/test/MC/AMDGPU/hsa.s Mon Apr 9 13:47:22 2018
@@ -135,7 +135,6 @@ amd_kernel_code_t_test_all:
// ASM: amd_machine_version_stepping = 5
// ASM: kernel_code_entry_byte_offset = 512
// ASM: kernel_code_prefetch_byte_size = 1
-// ASM: max_scratch_backing_memory_byte_size = 1
// ASM: granulated_workitem_vgpr_count = 1
// ASM: granulated_wavefront_sgpr_count = 1
// ASM: priority = 1
@@ -212,14 +211,13 @@ amd_kernel_code_t_minimal:
// ASM-LABEL: {{^}}amd_kernel_code_t_minimal:
// ASM: .amd_kernel_code_t
// ASM: amd_code_version_major = 1
-// ASM: amd_code_version_minor = 1
+// ASM: amd_code_version_minor = 2
// ASM: amd_machine_kind = 1
// ASM: amd_machine_version_major = 7
// ASM: amd_machine_version_minor = 0
// ASM: amd_machine_version_stepping = 0
// ASM: kernel_code_entry_byte_offset = 256
// ASM: kernel_code_prefetch_byte_size = 0
-// ASM: max_scratch_backing_memory_byte_size = 0
// ASM: granulated_workitem_vgpr_count = 1
// ASM: granulated_wavefront_sgpr_count = 1
// ASM: priority = 0
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