[llvm] r329565 - [X86][MMX] Fix missing itinerary for CVTPI2PS

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 9 06:27:47 PDT 2018


Author: rksimon
Date: Mon Apr  9 06:27:47 2018
New Revision: 329565

URL: http://llvm.org/viewvc/llvm-project?rev=329565&view=rev
Log:
[X86][MMX] Fix missing itinerary for CVTPI2PS

Modified:
    llvm/trunk/lib/Target/X86/X86InstrMMX.td
    llvm/trunk/test/CodeGen/X86/mmx-schedule.ll

Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=329565&r1=329564&r2=329565&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Mon Apr  9 06:27:47 2018
@@ -206,15 +206,15 @@ multiclass sse12_cvt_pint<bits<8> opc, R
 
 multiclass sse12_cvt_pint_3addr<bits<8> opc, RegisterClass SrcRC,
                     RegisterClass DstRC, Intrinsic Int, X86MemOperand x86memop,
-                    PatFrag ld_frag, string asm, Domain d> {
+                    PatFrag ld_frag, string asm, OpndItins itins, Domain d> {
   def irr : MMXPI<opc, MRMSrcReg, (outs DstRC:$dst),
                   (ins DstRC:$src1, SrcRC:$src2), asm,
                   [(set DstRC:$dst, (Int DstRC:$src1, SrcRC:$src2))],
-                  NoItinerary, d>, Sched<[WriteCvtI2F]>;
+                  itins.rr, d>, Sched<[WriteCvtI2F]>;
   def irm : MMXPI<opc, MRMSrcMem, (outs DstRC:$dst),
                   (ins DstRC:$src1, x86memop:$src2), asm,
                   [(set DstRC:$dst, (Int DstRC:$src1, (ld_frag addr:$src2)))],
-                  NoItinerary, d>, Sched<[WriteCvtI2FLd]>;
+                  itins.rm, d>, Sched<[WriteCvtI2FLd]>;
 }
 
 //===----------------------------------------------------------------------===//
@@ -596,7 +596,7 @@ let Constraints = "$src1 = $dst" in {
   defm MMX_CVTPI2PS : sse12_cvt_pint_3addr<0x2A, VR64, VR128,
                          int_x86_sse_cvtpi2ps,
                          i64mem, load, "cvtpi2ps\t{$src2, $dst|$dst, $src2}",
-                          SSEPackedSingle>, PS;
+                         MMX_CVT_PS_ITINS, SSEPackedSingle>, PS;
 }
 
 // Extract / Insert

Modified: llvm/trunk/test/CodeGen/X86/mmx-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-schedule.ll?rev=329565&r1=329564&r2=329565&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-schedule.ll Mon Apr  9 06:27:47 2018
@@ -188,8 +188,8 @@ define <4 x float> @test_cvtpi2ps(x86_mm
 ;
 ; ATOM-LABEL: test_cvtpi2ps:
 ; ATOM:       # %bb.0:
-; ATOM-NEXT:    cvtpi2ps (%rdi), %xmm1 # sched: [0:?]
-; ATOM-NEXT:    cvtpi2ps %mm0, %xmm0 # sched: [0:?]
+; ATOM-NEXT:    cvtpi2ps %mm0, %xmm0 # sched: [5:5.00]
+; ATOM-NEXT:    cvtpi2ps (%rdi), %xmm1 # sched: [5:5.00]
 ; ATOM-NEXT:    addps %xmm1, %xmm0 # sched: [5:5.00]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;




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