[PATCH] D45429: [AArch64][AsmParser] Make parse function for VectorLists generic to other vector types.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 9 02:34:51 PDT 2018
sdesmalen created this revision.
sdesmalen added reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro.
Herald added a subscriber: kristof.beyls.
Added 'RegisterKind' to the VectorListOp structure, so that this operand
type can be reused for SVE vector lists in a later patch. It also
refactors the 'tryParseVectorList' function so it can be used directly
in the ParserMethod of an operand. The parsing can now parse multiple
kinds of vectors and recover if there is no match.
This is patch [3/6] in a series to add assembler/disassembler support for
SVE's contiguous ST1 (scalar+imm) instructions.
https://reviews.llvm.org/D45429
Files:
lib/Target/AArch64/AArch64RegisterInfo.td
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
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