[PATCH] D41350: [DAGCombine] Improve ReduceLoadWidth for SRL

[Phabricator via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL329551: [DAGCombine] Improve ReduceLoad for SRL (authored by sam_parker, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D41350?vs=141344&id=141592#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D41350

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/trunk/test/CodeGen/ARM/shift-combine.ll
  llvm/trunk/test/CodeGen/PowerPC/trunc-srl-load.ll
  llvm/trunk/test/CodeGen/X86/h-registers-1.ll

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