[PATCH] D45181: [RISCV WIP] Add diff relocation support for RISC-V
Simon Cook via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 6 16:57:20 PDT 2018
simoncook updated this revision to Diff 141454.
simoncook edited the summary of this revision.
simoncook added a comment.
Herald added a subscriber: zzheng.
I've updated the patch to respond to comments, and deal with the couple of test failures I was seeing.
The only one I think may need some thoughts on is the changes I made to `hilo-constaddr.s`: Using `%lo` on an expression won't work in this case, gas doesn't accept it as input, and in the relaxation case I don't believe there are RISC-V relocations that could represent such an expression. I've split out the test case into two files, one for the working case, and one for the input I would consider invalid.
Does this seem reasonable, I think we might want to reject this all the time, and not just when linker relaxation is enabled. Otherwise I think it could cause confusion that some expressions are accepted by the assembler only when relaxation is on. (For reference, this is the change in `RISCVMCExpr.cpp`) Any thoughts on this?
Alex, as far as I'm aware, this covers all cases where constants are emitted from what I've seen so far.
Ana, we can tie this to linker relaxation, looking at https://reviews.llvm.org/D44886 which I think adds the MC part of conditional relaxation, my change in the AsmBackend can be easily swapped from `return true` to querying the SubTargetInfo for `return enableLinkerRelax()` when that lands.
Repository:
rL LLVM
https://reviews.llvm.org/D45181
Files:
include/llvm/MC/MCAsmBackend.h
include/llvm/MC/MCFixup.h
lib/MC/MCAsmBackend.cpp
lib/MC/MCAssembler.cpp
lib/MC/MCExpr.cpp
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
test/MC/RISCV/fixups-expr.s
test/MC/RISCV/hilo-constaddr.s
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