[PATCH] D45385: [RISCV] Tablegen-driven Instruction Compression.
Sameer AbuAsal via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 6 14:11:36 PDT 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL329455: [RISCV] Tablegen-driven Instruction Compression. (authored by sabuasal, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D45385?vs=141401&id=141420#toc
Repository:
rL LLVM
https://reviews.llvm.org/D45385
Files:
llvm/trunk/include/llvm/MC/MCInst.h
llvm/trunk/lib/MC/MCInst.cpp
llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/trunk/lib/Target/RISCV/CMakeLists.txt
llvm/trunk/lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp
llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
llvm/trunk/lib/Target/RISCV/RISCVAsmPrinter.cpp
llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.td
llvm/trunk/lib/Target/RISCV/RISCVInstrInfoC.td
llvm/trunk/test/CodeGen/RISCV/alu32.ll
llvm/trunk/test/CodeGen/RISCV/branch.ll
llvm/trunk/test/CodeGen/RISCV/compress-Pseudo.ll
llvm/trunk/test/CodeGen/RISCV/compress-inline-asm.ll
llvm/trunk/test/MC/RISCV/cnop.s
llvm/trunk/test/MC/RISCV/compress-cjal.s
llvm/trunk/test/MC/RISCV/compress-rv32d.s
llvm/trunk/test/MC/RISCV/compress-rv32f.s
llvm/trunk/test/MC/RISCV/compress-rv32i.s
llvm/trunk/test/MC/RISCV/compress-rv64i.s
llvm/trunk/test/MC/RISCV/compressed-relocations.s
llvm/trunk/test/MC/RISCV/fixups-compressed.s
llvm/trunk/test/MC/RISCV/relocations.s
llvm/trunk/test/MC/RISCV/rv32-relaxation.s
llvm/trunk/test/MC/RISCV/rv64-relaxation.s
llvm/trunk/utils/TableGen/CMakeLists.txt
llvm/trunk/utils/TableGen/RISCVCompressInstEmitter.cpp
llvm/trunk/utils/TableGen/TableGen.cpp
llvm/trunk/utils/TableGen/TableGenBackends.h
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