[llvm] r329439 - [Hexagon] Fix assert with packetizing IMPLICIT_DEF instructions

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Fri Apr  6 11:19:22 2018
New Revision: 329439

URL: http://llvm.org/viewvc/llvm-project?rev=329439&view=rev
Log:
[Hexagon] Fix assert with packetizing IMPLICIT_DEF instructions

The compiler is generating packet with the following instructions,
which causes an undefined register assert in the verifier.

  $r0 = IMPLICIT_DEF
  $r1 = IMPLICIT_DEF
  S2_storerd_io killed $r29, 0, killed %d0

The problem is that the packetizer is not saving the IMPLICIT_DEF
instructions, which are needed when checking if it is legal to
add the store instruction. The fix is to add the IMPLICIT_DEF
instructions to the CurrentPacketMIs structure.

Patch by Brendon Cahoon.

Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp?rev=329439&r1=329438&r2=329439&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp Fri Apr  6 11:19:22 2018
@@ -1687,8 +1687,12 @@ HexagonPacketizerList::addToPacket(Machi
     PacketStalls = false;
   PacketStalls |= producesStall(MI);
 
-  if (MI.isImplicitDef())
+  if (MI.isImplicitDef()) {
+    // Add to the packet to allow subsequent instructions to be checked
+    // properly.
+    CurrentPacketMIs.push_back(&MI);
     return MII;
+  }
   assert(ResourceTracker->canReserveResources(MI));
 
   bool ExtMI = HII->isExtended(MI) || HII->isConstExtended(MI);