[llvm] r329114 - MSG

[Davide Italiano via llvm-commits]

oh, you already did that, nevermind.
I generally try to follow-up on the original commit message with a
message pointing to the revert commit, but I guess that's optional.

Thanks,

--
Davide

On Thu, Apr 5, 2018 at 8:04 AM, Davide Italiano <davide at freebsd.org> wrote:
> Please revert this and recommit with a real commit message.
>
> On Tue, Apr 3, 2018 at 2:20 PM, Farhana Aleen via llvm-commits
> <llvm-commits at lists.llvm.org> wrote:
>> Author: faaleen
>> Date: Tue Apr  3 14:20:39 2018
>> New Revision: 329114
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=329114&view=rev
>> Log:
>> MSG
>>
>> Modified:
>>     llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
>>     llvm/trunk/test/CodeGen/AMDGPU/fmax3.ll
>>     llvm/trunk/test/CodeGen/AMDGPU/fmin3.ll
>>
>> Modified: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp?rev=329114&r1=329113&r2=329114&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (original)
>> +++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp Tue Apr  3 14:20:39 2018
>> @@ -6446,7 +6446,7 @@ SDValue SITargetLowering::performMinMaxC
>>
>>
>>    if (Opc != AMDGPUISD::FMIN_LEGACY && Opc != AMDGPUISD::FMAX_LEGACY &&
>> -      VT != MVT::f64 &&
>> +      !VT.isVector() && VT != MVT::f64 &&
>>        ((VT != MVT::f16 && VT != MVT::i16) || Subtarget->hasMin3Max3_16())) {
>>      // max(max(a, b), c) -> max3(a, b, c)
>>      // min(min(a, b), c) -> min3(a, b, c)
>>
>> Modified: llvm/trunk/test/CodeGen/AMDGPU/fmax3.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/fmax3.ll?rev=329114&r1=329113&r2=329114&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/AMDGPU/fmax3.ll (original)
>> +++ llvm/trunk/test/CodeGen/AMDGPU/fmax3.ll Tue Apr  3 14:20:39 2018
>> @@ -84,9 +84,21 @@ define amdgpu_kernel void @test_fmax3_ol
>>    ret void
>>  }
>>
>> +; Checks whether the test passes; performMinMaxCombine() should not optimize vector patterns of max3
>> +; since there are no pack instructions for fmax3.
>> +; GCN-LABEL: {{^}}no_fmax3_v2f16:
>> +define <2 x half> @no_fmax3_v2f16(<2 x half> %a, <2 x half> %b, <2 x half> %c, <2 x half> %d) {
>> +entry:
>> +  %max = tail call fast <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> %b)
>> +  %max1 = tail call fast <2 x half> @llvm.maxnum.v2f16(<2 x half> %c, <2 x half> %max)
>> +  %res = tail call fast <2 x half> @llvm.maxnum.v2f16(<2 x half> %max1, <2 x half> %d)
>> +  ret <2 x half> %res
>> +}
>> +
>>  declare i32 @llvm.amdgcn.workitem.id.x() #1
>>  declare float @llvm.maxnum.f32(float, float) #1
>>  declare half @llvm.maxnum.f16(half, half) #1
>> +declare <2 x half> @llvm.maxnum.v2f16(<2 x half>, <2 x half>)
>>
>>  attributes #0 = { nounwind }
>>  attributes #1 = { nounwind readnone speculatable }
>>
>> Modified: llvm/trunk/test/CodeGen/AMDGPU/fmin3.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/fmin3.ll?rev=329114&r1=329113&r2=329114&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/AMDGPU/fmin3.ll (original)
>> +++ llvm/trunk/test/CodeGen/AMDGPU/fmin3.ll Tue Apr  3 14:20:39 2018
>> @@ -82,9 +82,21 @@ define amdgpu_kernel void @test_fmin3_ol
>>    ret void
>>  }
>>
>> +; Checks whether the test passes; performMinMaxCombine() should not optimize vector patterns of min3
>> +; since there are no pack instructions for fmin3.
>> +; GCN-LABEL: {{^}}no_fmin3_v2f16:
>> +define <2 x half> @no_fmin3_v2f16(<2 x half> %a, <2 x half> %b, <2 x half> %c, <2 x half> %d) {
>> +entry:
>> +  %min = tail call fast <2 x half> @llvm.minnum.v2f16(<2 x half> %a, <2 x half> %b)
>> +  %min1 = tail call fast <2 x half> @llvm.minnum.v2f16(<2 x half> %c, <2 x half> %min)
>> +  %res = tail call fast <2 x half> @llvm.minnum.v2f16(<2 x half> %min1, <2 x half> %d)
>> +  ret <2 x half> %res
>> +}
>> +
>>  declare i32 @llvm.amdgcn.workitem.id.x() #1
>>  declare float @llvm.minnum.f32(float, float) #1
>>  declare half @llvm.minnum.f16(half, half) #1
>> +declare <2 x half> @llvm.minnum.v2f16(<2 x half>, <2 x half>)
>>
>>  attributes #0 = { nounwind }
>>  attributes #1 = { nounwind readnone speculatable }
>>
>>
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>
>
>
> --
> Davide
>
> "There are no solved problems; there are only problems that are more
> or less solved" -- Henri Poincare



-- 
Davide

"There are no solved problems; there are only problems that are more
or less solved" -- Henri Poincare