[PATCH] D45253: [X86][WAITPKG] WaitPKG instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: lib/Target/X86/X86InstrInfo.td:2680
+                   "umonitor\t$src",
+                 [(int_x86_umonitor GR32:$src)]>, XS,
+                Requires<[HasWAITPKG, Not64BitMode]>;
----------------
Line these up with the 0xAE on the first line.


================
Comment at: lib/Target/X86/X86InstrInfo.td:2683
+  def UMONITOR64 : I<0xAE, MRM6r, (outs), (ins GR64:$src),
+                   "umonitor\t$src",
+                 [(int_x86_umonitor GR64:$src)]>, XS,
----------------
Line these up.


================
Comment at: lib/Target/X86/X86InstrInfo.td:2705
+  }
+} // SchedRW
+
----------------
Based on where these landed in the opcode map, you should change the TB on MFENCE in X86InstrSSE.td to PS.

Before this patch, this sequence of bytes disassembled as mfence, but it should have been invalid. The PS will fix that.
0xf3,0x41,0x0f,0xae,0xf0

I suspect LFENCE should probably be PS as well, but we haven't gotten a collision there yet. SFENCE was fixed when PCOMMIT was added. Though PCOMMIT was later removed.


Repository:
  rL LLVM

https://reviews.llvm.org/D45253