[PATCH] D45265: [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
Stefan Pintilie via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 4 09:30:26 PDT 2018
stefanp created this revision.
stefanp added reviewers: kbarton, nemanjai, inouehrs, sfertile, lei, syzaara, hfinkel, echristo.
We want to run the Machine Scheduler instead of the List Scheduler after RA.
Checked with a performance run on a Power 9 machine with SPEC 2006 and while some benchmarks improved and others degraded the geomean was slightly improved with the Machine Scheduler.
https://reviews.llvm.org/D45265
Files:
lib/Target/PowerPC/PPCTargetMachine.cpp
Index: lib/Target/PowerPC/PPCTargetMachine.cpp
===================================================================
--- lib/Target/PowerPC/PPCTargetMachine.cpp
+++ lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -25,6 +25,7 @@
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetLoweringObjectFile.h"
#include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/Function.h"
@@ -303,7 +304,12 @@
class PPCPassConfig : public TargetPassConfig {
public:
PPCPassConfig(PPCTargetMachine &TM, PassManagerBase &PM)
- : TargetPassConfig(TM, PM) {}
+ : TargetPassConfig(TM, PM) {
+ // At any optimization level above -O0 we use the Machine Scheduler and not
+ // the default Post RA List Scheduler.
+ if (TM.getOptLevel() != CodeGenOpt::None)
+ substitutePass(&PostRASchedulerID, &PostMachineSchedulerID);
+ }
PPCTargetMachine &getPPCTargetMachine() const {
return getTM<PPCTargetMachine>();
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