[llvm] r329197 - [AMDGPU][MC] Enabled instruction TBUFFER_LOAD_FORMAT_XYZ for SI/CI
Dmitry Preobrazhensky via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 4 06:54:55 PDT 2018
Author: dpreobra
Date: Wed Apr 4 06:54:55 2018
New Revision: 329197
URL: http://llvm.org/viewvc/llvm-project?rev=329197&view=rev
Log:
[AMDGPU][MC] Enabled instruction TBUFFER_LOAD_FORMAT_XYZ for SI/CI
See bug 36958: https://bugs.llvm.org/show_bug.cgi?id=36958
Differential Revision: https://reviews.llvm.org/D45099
Reviewers: artem.tamazov, arsenm, timcorringham
Modified:
llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td
llvm/trunk/test/MC/AMDGPU/mtbuf.s
Modified: llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td?rev=329197&r1=329196&r2=329197&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td Wed Apr 4 06:54:55 2018
@@ -1790,7 +1790,7 @@ multiclass MTBUF_Real_AllAddr_si<bits<3>
defm TBUFFER_LOAD_FORMAT_X : MTBUF_Real_AllAddr_si <0>;
defm TBUFFER_LOAD_FORMAT_XY : MTBUF_Real_AllAddr_si <1>;
-//defm TBUFFER_LOAD_FORMAT_XYZ : MTBUF_Real_AllAddr_si <2>;
+defm TBUFFER_LOAD_FORMAT_XYZ : MTBUF_Real_AllAddr_si <2>;
defm TBUFFER_LOAD_FORMAT_XYZW : MTBUF_Real_AllAddr_si <3>;
defm TBUFFER_STORE_FORMAT_X : MTBUF_Real_AllAddr_si <4>;
defm TBUFFER_STORE_FORMAT_XY : MTBUF_Real_AllAddr_si <5>;
Modified: llvm/trunk/test/MC/AMDGPU/mtbuf.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/mtbuf.s?rev=329197&r1=329196&r2=329197&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/mtbuf.s (original)
+++ llvm/trunk/test/MC/AMDGPU/mtbuf.s Wed Apr 4 06:54:55 2018
@@ -14,6 +14,10 @@ tbuffer_load_format_xy v[1:2], off, s[4:
// SICI: tbuffer_load_format_xy v[1:2], off, s[4:7], dfmt:15, nfmt:2, s1 ; encoding: [0x00,0x00,0x79,0xe9,0x00,0x01,0x01,0x01]
// VI: tbuffer_load_format_xy v[1:2], off, s[4:7], dfmt:15, nfmt:2, s1 ; encoding: [0x00,0x80,0x78,0xe9,0x00,0x01,0x01,0x01]
+tbuffer_load_format_xyz v[1:4], off, s[4:7], dfmt:15, nfmt:2, s1
+// SICI: tbuffer_load_format_xyz v[1:4], off, s[4:7], dfmt:15, nfmt:2, s1 ; encoding: [0x00,0x00,0x7a,0xe9,0x00,0x01,0x01,0x01]
+// VI: tbuffer_load_format_xyz v[1:4], off, s[4:7], dfmt:15, nfmt:2, s1 ; encoding: [0x00,0x00,0x79,0xe9,0x00,0x01,0x01,0x01]
+
tbuffer_load_format_xyzw v[1:4], off, s[4:7], dfmt:15, nfmt:2, s1
// SICI: tbuffer_load_format_xyzw v[1:4], off, s[4:7], dfmt:15, nfmt:2, s1 ; encoding: [0x00,0x00,0x7b,0xe9,0x00,0x01,0x01,0x01]
// VI: tbuffer_load_format_xyzw v[1:4], off, s[4:7], dfmt:15, nfmt:2, s1 ; encoding: [0x00,0x80,0x79,0xe9,0x00,0x01,0x01,0x01]
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