[PATCH] D45146: [x86] Introduce a pass to begin more systematically fixing PR36028 and similar issues.

Chandler Carruth via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 3 16:40:25 PDT 2018


chandlerc marked 22 inline comments as done.
chandlerc added a comment.

All done. Everything just passed the machine verifier. =]



================
Comment at: llvm/test/CodeGen/X86/cmpxchg-clobber-flags.ll:11-29
 ; TODO: Reenable verify-machineinstr once the if (!AXDead) // FIXME
 ; in X86InstrInfo::copyPhysReg() is resolved.
 
 declare i32 @foo()
 declare i32 @bar(i64)
 
 ; In the following case when using fast scheduling we get a long chain of
----------------
rnk wrote:
> rnk wrote:
> > These comments are super stale. Maybe update them to reflect the new checks?
> Can we do this now?
Updated a bit. We still do get the long change of copies, but now they fit into the register allocator so it generates much better code.


================
Comment at: llvm/test/CodeGen/X86/flags-copy-lowering.mir:10-11
+  
+  define i32 @test_branch(i64 %a, i64 %b) {
+  entry:
+    call void @foo()
----------------
rnk wrote:
> I guess all this IR up here is MIR boilerplate. =/
Yep.


================
Comment at: llvm/test/CodeGen/X86/mul-i1024.ll:1
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X32
----------------
rnk wrote:
> This seems like a questionable use of auto-generated llc checks. :(
Yeah, but not gonna fix here. Already tried (hard) to make it better and it is still bleh.


Repository:
  rL LLVM

https://reviews.llvm.org/D45146





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