[llvm] r329079 - [Hexagon] Remove -mhvx-double and the corresponding subtarget feature
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 3 09:06:37 PDT 2018
Author: kparzysz
Date: Tue Apr 3 09:06:36 2018
New Revision: 329079
URL: http://llvm.org/viewvc/llvm-project?rev=329079&view=rev
Log:
[Hexagon] Remove -mhvx-double and the corresponding subtarget feature
Specifying the HVX vector length should be done via the -mhvx-length
option.
Modified:
llvm/trunk/lib/Target/Hexagon/Hexagon.td
llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.td
llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
Modified: llvm/trunk/lib/Target/Hexagon/Hexagon.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/Hexagon.td?rev=329079&r1=329078&r2=329079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/Hexagon.td (original)
+++ llvm/trunk/lib/Target/Hexagon/Hexagon.td Tue Apr 3 09:06:36 2018
@@ -36,18 +36,11 @@ def ExtensionHVXV62: SubtargetFeature<"h
def ExtensionHVXV65: SubtargetFeature<"hvxv65", "HexagonHVXVersion",
"Hexagon::ArchEnum::V65", "Hexagon HVX instructions",
[ExtensionHVX,ExtensionHVXV60, ExtensionHVXV62]>;
-def ExtensionHVX64B
- : SubtargetFeature<"hvx-length64b", "UseHVX64BOps", "true",
- "Hexagon HVX 64B instructions", [ExtensionHVX]>;
-def ExtensionHVX128B
- : SubtargetFeature<"hvx-length128b", "UseHVX128BOps", "true",
- "Hexagon HVX 128B instructions", [ExtensionHVX]>;
-
-// This is an alias to ExtensionHVX128B to accept the hvx-double as
-// an acceptable subtarget feature.
-def ExtensionHVXDbl
- : SubtargetFeature<"hvx-double", "UseHVX128BOps", "true",
- "Hexagon HVX 128B instructions", [ExtensionHVX128B]>;
+
+def ExtensionHVX64B: SubtargetFeature<"hvx-length64b", "UseHVX64BOps",
+ "true", "Hexagon HVX 64B instructions", [ExtensionHVX]>;
+def ExtensionHVX128B: SubtargetFeature<"hvx-length128b", "UseHVX128BOps",
+ "true", "Hexagon HVX 128B instructions", [ExtensionHVX]>;
def FeaturePackets: SubtargetFeature<"packets", "UsePackets", "true",
"Support for instruction packets">;
@@ -55,9 +48,9 @@ def FeatureLongCalls: SubtargetFeature<"
"Use constant-extended calls">;
def FeatureMemNoShuf: SubtargetFeature<"mem_noshuf", "HasMemNoShuf", "false",
"Supports mem_noshuf feature">;
-def FeatureNVJ : SubtargetFeature<"nvj", "UseNewValueJumps", "true",
+def FeatureNVJ: SubtargetFeature<"nvj", "UseNewValueJumps", "true",
"Support for new-value jumps", [FeaturePackets]>;
-def FeatureDuplex : SubtargetFeature<"duplex", "EnableDuplex", "true",
+def FeatureDuplex: SubtargetFeature<"duplex", "EnableDuplex", "true",
"Enable generation of duplex instruction">;
def FeatureReservedR19: SubtargetFeature<"reserved-r19", "ReservedR19",
"true", "Reserve register R19">;
@@ -81,10 +74,8 @@ def UseHVXV62 : Predicate<"HST-
def UseHVXV65 : Predicate<"HST->useHVXOps()">,
AssemblerPredicate<"ExtensionHVXV65">;
-def Hvx64 : HwMode<"+hvx-length64b">;
-def Hvx64old : HwMode<"-hvx-double">;
-def Hvx128 : HwMode<"+hvx-length128b">;
-def Hvx128old : HwMode<"+hvx-double">;
+def Hvx64: HwMode<"+hvx-length64b">;
+def Hvx128: HwMode<"+hvx-length128b">;
//===----------------------------------------------------------------------===//
// Classes used for relation maps.
Modified: llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.td?rev=329079&r1=329078&r2=329079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.td Tue Apr 3 09:06:36 2018
@@ -270,36 +270,28 @@ let Namespace = "Hexagon" in {
// HVX types
-def VecI1
- : ValueTypeByHwMode<[Hvx64, Hvx64old, Hvx128, Hvx128old, DefaultMode],
- [v512i1, v512i1, v1024i1, v1024i1, v512i1]>;
-def VecI8
- : ValueTypeByHwMode<[Hvx64, Hvx64old, Hvx128, Hvx128old, DefaultMode],
- [v64i8, v64i8, v128i8, v128i8, v64i8]>;
-def VecI16
- : ValueTypeByHwMode<[Hvx64, Hvx64old, Hvx128, Hvx128old, DefaultMode],
- [v32i16, v32i16, v64i16, v64i16, v32i16]>;
-def VecI32
- : ValueTypeByHwMode<[Hvx64, Hvx64old, Hvx128, Hvx128old, DefaultMode],
- [v16i32, v16i32, v32i32, v32i32, v16i32]>;
-def VecPI8
- : ValueTypeByHwMode<[Hvx64, Hvx64old, Hvx128, Hvx128old, DefaultMode],
- [v128i8, v128i8, v256i8, v256i8, v128i8]>;
-def VecPI16
- : ValueTypeByHwMode<[Hvx64, Hvx64old, Hvx128, Hvx128old, DefaultMode],
- [v64i16, v64i16, v128i16, v128i16, v64i16]>;
-def VecPI32
- : ValueTypeByHwMode<[Hvx64, Hvx64old, Hvx128, Hvx128old, DefaultMode],
- [v32i32, v32i32, v64i32, v64i32, v32i32]>;
-def VecQ8
- : ValueTypeByHwMode<[Hvx64, Hvx64old, Hvx128, Hvx128old, DefaultMode],
- [v64i1, v64i1, v128i1, v128i1, v64i1]>;
-def VecQ16
- : ValueTypeByHwMode<[Hvx64, Hvx64old, Hvx128, Hvx128old, DefaultMode],
- [v32i1, v32i1, v64i1, v64i1, v32i1]>;
-def VecQ32
- : ValueTypeByHwMode<[Hvx64, Hvx64old, Hvx128, Hvx128old, DefaultMode],
- [v16i1, v16i1, v32i1, v32i1, v16i1]>;
+def VecI1: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
+ [v512i1, v1024i1, v512i1]>;
+def VecI8: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
+ [v64i8, v128i8, v64i8]>;
+def VecI16: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
+ [v32i16, v64i16, v32i16]>;
+def VecI32: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
+ [v16i32, v32i32, v16i32]>;
+
+def VecPI8: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
+ [v128i8, v256i8, v128i8]>;
+def VecPI16: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
+ [v64i16, v128i16, v64i16]>;
+def VecPI32: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
+ [v32i32, v64i32, v32i32]>;
+
+def VecQ8: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
+ [v64i1, v128i1, v64i1]>;
+def VecQ16: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
+ [v32i1, v64i1, v32i1]>;
+def VecQ32: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
+ [v16i1, v32i1, v16i1]>;
// HVX register classes
Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp?rev=329079&r1=329078&r2=329079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp Tue Apr 3 09:06:36 2018
@@ -342,8 +342,7 @@ FeatureBitset Hexagon_MC::completeHVXFea
break;
}
bool UseHvx = false;
- for (unsigned F : {ExtensionHVX, ExtensionHVX64B, ExtensionHVX128B,
- ExtensionHVXDbl}) {
+ for (unsigned F : {ExtensionHVX, ExtensionHVX64B, ExtensionHVX128B}) {
if (!FB.test(F))
continue;
UseHvx = true;
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