[PATCH] D45183: [PostRASink] Add NoVRegs property

[Jun Bum Lim via Phabricator via llvm-commits]

junbuml created this revision.
junbuml added reviewers: dschuff, jlebar, tra, jgravelle-google, MatzeB, sebpop, thegameg, mcrosier.
Herald added subscribers: sunfish, aheejin, sbc100, jfb, jholewinski.

This change declare that PostRAMachineSinking pass require NoVRegs property, so
now the MachineFunctionPass can enforce this check.
Disable the PostRAMachineSinking pass for NVPTX & WebAssembly.


https://reviews.llvm.org/D45183

Files:
  lib/CodeGen/MachineSink.cpp
  lib/Target/NVPTX/NVPTXTargetMachine.cpp
  lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp


Index: lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
===================================================================
--- lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -250,6 +250,7 @@
 
   // These functions all require the NoVRegs property.
   disablePass(&MachineCopyPropagationID);
+  disablePass(&PostRAMachineSinkingID);
   disablePass(&PostRASchedulerID);
   disablePass(&FuncletLayoutID);
   disablePass(&StackMapLivenessID);
Index: lib/Target/NVPTX/NVPTXTargetMachine.cpp
===================================================================
--- lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -228,6 +228,7 @@
   disablePass(&TailDuplicateID);
   disablePass(&StackMapLivenessID);
   disablePass(&LiveDebugValuesID);
+  disablePass(&PostRAMachineSinkingID);
   disablePass(&PostRASchedulerID);
   disablePass(&FuncletLayoutID);
   disablePass(&PatchableFunctionID);
Index: lib/CodeGen/MachineSink.cpp
===================================================================
--- lib/CodeGen/MachineSink.cpp
+++ lib/CodeGen/MachineSink.cpp
@@ -953,6 +953,11 @@
     MachineFunctionPass::getAnalysisUsage(AU);
   }
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+      MachineFunctionProperties::Property::NoVRegs);
+  }
+
 private:
   /// Track which registers have been modified and used.
   BitVector ModifiedRegs, UsedRegs;


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