[PATCH] D45157: [RegUsageInfoCollector] Don't assume the alias of a defined reg is always already in the set.

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa created this revision.
jonpa added a reviewer: qcolombet.

As the test case in https://bugs.llvm.org/show_bug.cgi?id=36587 discovered, it is wrong to assume that all the aliases of the defined register in the *current function* is already present in the UsedPhysRegsMask.

This patch changes this so that any definition in the current function of a phys-reg always results in all its aliases inserted into the set of defined registers.


https://reviews.llvm.org/D45157

Files:
  lib/CodeGen/RegUsageInfoCollector.cpp
  test/CodeGen/SystemZ/ipra.ll


Index: test/CodeGen/SystemZ/ipra.ll
===================================================================
--- /dev/null
+++ test/CodeGen/SystemZ/ipra.ll
@@ -0,0 +1,43 @@
+; Test that the set of used phys regs used by interprocedural register
+; allocation is correct for a test case where the called function (@fn2)
+; itself has a call (to @fn1). @fn1 defines %r0l, while @fn2 defines
+; %r0d. The RegUsageInfo for @fn2 must include %r0h.
+;
+; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -enable-ipra -print-regusage 2>&1 < %s \
+; RUN:   | FileCheck %s
+;
+; CHECK: fn2 Clobbered Registers: {{.*}} $r0h
+
+ at h = external global [0 x i32], align 4
+ at n = external global i32*, align 8
+
+define void @fn1() {
+  br label %1
+
+; <label>:1:                                      ; preds = %1, %0
+  %2 = getelementptr inbounds [0 x i32], [0 x i32]* @h, i64 0, i64 undef
+  %3 = load i32, i32* %2
+  store i32 %3, i32* undef
+  br label %1
+}
+
+define void @fn2() {
+  br label %1
+
+; <label>:1:                                      ; preds = %0
+  br i1 undef, label %2, label %3
+
+; <label>:2:                                      ; preds = %1
+  store i32* null, i32** @n
+  unreachable
+
+; <label>:3:                                      ; preds = %1
+  call void @fn1()
+  unreachable
+}
+
+define void @main() {
+  call void @fn2()
+  ret void
+}
+
Index: lib/CodeGen/RegUsageInfoCollector.cpp
===================================================================
--- lib/CodeGen/RegUsageInfoCollector.cpp
+++ lib/CodeGen/RegUsageInfoCollector.cpp
@@ -110,19 +110,18 @@
   // Scan all the physical registers. When a register is defined in the current
   // function set it and all the aliasing registers as defined in the regmask.
   for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
-    // If a register is in the UsedPhysRegsMask set then mark it as defined.
-    // All it's aliases will also be in the set, so we can skip setting
-    // as defined all the aliases here.
-    if (UsedPhysRegsMask.test(PReg)) {
-      SetRegAsDefined(PReg);
-      continue;
-    }
     // If a register is defined by an instruction mark it as defined together
     // with all it's aliases.
     if (!MRI->def_empty(PReg)) {
       for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI)
         SetRegAsDefined(*AI);
+      continue;
     }
+    // If a register is in the UsedPhysRegsMask set then mark it as defined.
+    // All clobbered aliases will also be in the set, so we can skip setting
+    // as defined all the aliases here.
+    if (UsedPhysRegsMask.test(PReg))
+      SetRegAsDefined(PReg);
   }
 
   if (!TargetFrameLowering::isSafeForNoCSROpt(F)) {


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D45157.140612.patch
Type: text/x-patch
Size: 2694 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180402/a7c10454/attachment.bin>