[PATCH] D45105: [AArch64] Reserve x18 register on Fuchsia

[Petr Hosek via Phabricator via llvm-commits]

phosek created this revision.
phosek added a reviewer: mcgrathr.
Herald added subscribers: llvm-commits, hiraditya, kristof.beyls, javed.absar, rengolin.

This register is reserved as a platform register on Fuchsia.


Repository:
  rL LLVM

https://reviews.llvm.org/D45105

Files:
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/test/CodeGen/AArch64/aarch64-named-reg-w18.ll
  llvm/test/CodeGen/AArch64/aarch64-named-reg-x18.ll
  llvm/test/CodeGen/AArch64/arm64-platform-reg.ll


Index: llvm/test/CodeGen/AArch64/arm64-platform-reg.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64-platform-reg.ll
+++ llvm/test/CodeGen/AArch64/arm64-platform-reg.ll
@@ -1,6 +1,7 @@
 ; RUN: llc -mtriple=arm64-apple-ios -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
 ; RUN: llc -mtriple=arm64-freebsd-gnu -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-fuchsia -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
 ; RUN: llc -mtriple=aarch64-windows -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
 
 ; x18 is reserved as a platform register on Darwin but not on other
Index: llvm/test/CodeGen/AArch64/aarch64-named-reg-x18.ll
===================================================================
--- llvm/test/CodeGen/AArch64/aarch64-named-reg-x18.ll
+++ llvm/test/CodeGen/AArch64/aarch64-named-reg-x18.ll
@@ -1,10 +1,8 @@
-; RUN: not llc -mtriple=aarch64-fuchsia -o - %s 2>&1 | FileCheck %s --check-prefix=ERROR
-; RUN: llc -mtriple=aarch64-fuchsia -mattr=+reserve-x18 -o - %s
+; RUN: llc -mtriple=aarch64-fuchsia -o - %s
 
 define void @set_x18(i64 %x) {
 entry:
 ; FIXME: Include an allocatable-specific error message
-; ERROR: Invalid register name "x18".
   tail call void @llvm.write_register.i64(metadata !0, i64 %x)
   ret void
 }
Index: llvm/test/CodeGen/AArch64/aarch64-named-reg-w18.ll
===================================================================
--- llvm/test/CodeGen/AArch64/aarch64-named-reg-w18.ll
+++ llvm/test/CodeGen/AArch64/aarch64-named-reg-w18.ll
@@ -1,10 +1,8 @@
-; RUN: not llc -mtriple=aarch64-fuchsia -o - %s 2>&1 | FileCheck %s --check-prefix=ERROR
-; RUN: llc -mtriple=aarch64-fuchsia -mattr=+reserve-x18 -o - %s
+; RUN: llc -mtriple=aarch64-fuchsia -o - %s
 
 define void @set_w18(i32 %x) {
 entry:
 ; FIXME: Include an allocatable-specific error message
-; ERROR: Invalid register name "w18".
   tail call void @llvm.write_register.i32(metadata !0, i32 %x)
   ret void
 }
Index: llvm/lib/Target/AArch64/AArch64Subtarget.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -151,8 +151,8 @@
                                    const std::string &FS,
                                    const TargetMachine &TM, bool LittleEndian)
     : AArch64GenSubtargetInfo(TT, CPU, FS),
-      ReserveX18(TT.isOSDarwin() || TT.isOSWindows()), IsLittle(LittleEndian),
-      TargetTriple(TT), FrameLowering(),
+      ReserveX18(TT.isOSDarwin() || TT.isOSFuchsia() || TT.isOSWindows()),
+      IsLittle(LittleEndian), TargetTriple(TT), FrameLowering(),
       InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(),
       TLInfo(TM, *this) {
   CallLoweringInfo.reset(new AArch64CallLowering(*getTargetLowering()));


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