[PATCH] D44919: [LoopUnroll][NFC] Remove redundant canPeel check

[Ikhlas Ajbar via Phabricator via llvm-commits]

iajbar reopened this revision.
iajbar added a comment.
This revision is now accepted and ready to land.

Hello Max, This assert(canPeel(L)) causes several tests to fail when I set PeelCount in Hexagon target. Apparently there is another path that is taken that calls peelLoop() and does not go through computePeelCount(). So it looks like the second check for canPeel in needed. Here is a test case: opt -march=hexagon -O3 -S < test.ll

- test.ll ---

target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon"

@g0 = external dso_local global i32, align 4

declare dso_local i64 @f0(i64, i32) #0

declare dso_local i32 @f1(i32, i32) #0

define dso_local void @f2(i16* %a0, i16* %a1, i16* %a2) #0 {
b0:

  %v0 = alloca i16, align 2
  %v1 = alloca [5 x i32], align 8
  %v2 = alloca i32, align 4
  store i16 0, i16* %v0, align 2, !tbaa !0
  br label %b1
   

b1:                                               ; preds = %b3, %b0

  %v3 = load i16, i16* %v0, align 2, !tbaa !0
  %v4 = sext i16 %v3 to i32
  %v5 = icmp slt i32 %v4, 5
  br i1 %v5, label %b2, label %b4
   

b2:                                               ; preds = %b1

  %v6 = call i32 @f1(i32 undef, i32 undef)
  %v7 = load i32, i32* @g0, align 4, !tbaa !4
  %v8 = icmp eq i32 %v7, 1
  br i1 %v8, label %b4, label %b3
   

b3:                                               ; preds = %b2

  %v9 = getelementptr inbounds [5 x i32], [5 x i32]* %v1, i32 0, i32 undef
  store i32 0, i32* %v9, align 4, !tbaa !6
  %v10 = load i16, i16* %v0, align 2, !tbaa !0
  %v11 = add i16 %v10, 1
  store i16 %v11, i16* %v0, align 2, !tbaa !0
  br label %b1
   

b4:                                               ; preds = %b2, %b1

  %v12 = getelementptr inbounds [5 x i32], [5 x i32]* %v1, i32 0, i32 undef
  %v13 = load i32, i32* %v12, align 4, !tbaa !6
  %v14 = call i64 @f0(i64 undef, i32 %v13)
  unreachable

}

attributes #0 = { "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }

!0 = !{!1, !1, i64 0}
!1 = !{!"short", !2, i64 0}
!2 = !{!"omnipotent char", !3, i64 0}
!3 = !{!"Simple C++ TBAA"}
!4 = !{!5, !5, i64 0}
!5 = !{!"int", !2, i64 0}
!6 = !{!7, !7, i64 0}

!7 = !{!"long", !2, i64 0}
--------------------------


Repository:
  rL LLVM

https://reviews.llvm.org/D44919