[PATCH] D44370: [X86] Combine vXi64 multiplies to MULDQ/MULUDQ during DAG combine instead of lowering.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:15070
 
+  if (SDValue V = convertBuildVecZextToZext(N))
+    return V;
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Its strange that we have reduceBuildVecExtToExtBuildVec for post-legalization and this for pre-legalization. Not exactly the same I know.


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Comment at: test/CodeGen/X86/combine-pmuldq.ll:8
 
 ; TODO - shuffle+sext are superfluous
 define <2 x i64> @combine_shuffle_sext_pmuldq(<4 x i32> %a0, <4 x i32> %a1) {
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This TODO can go


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Comment at: test/CodeGen/X86/combine-pmuldq.ll:27
 
 ; TODO - shuffle+zext are superfluous
 define <2 x i64> @combine_shuffle_zext_pmuludq(<4 x i32> %a0, <4 x i32> %a1) {
----------------
This TODO can go


https://reviews.llvm.org/D44370