[llvm] r328683 - [AArch64] add ftrunc tests; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Tue Mar 27 17:56:00 2018
New Revision: 328683

URL: http://llvm.org/viewvc/llvm-project?rev=328683&view=rev
Log:
[AArch64] add ftrunc tests; NFC

As suggested in D44909.

Added:
    llvm/trunk/test/CodeGen/AArch64/ftrunc.ll

Added: llvm/trunk/test/CodeGen/AArch64/ftrunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/ftrunc.ll?rev=328683&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/ftrunc.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/ftrunc.ll Tue Mar 27 17:56:00 2018
@@ -0,0 +1,47 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s
+
+define float @trunc_unsigned_f32(float %x) {
+; CHECK-LABEL: trunc_unsigned_f32:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fcvtzu w8, s0
+; CHECK-NEXT:    ucvtf s0, w8
+; CHECK-NEXT:    ret
+  %i = fptoui float %x to i32
+  %r = uitofp i32 %i to float
+  ret float %r
+}
+
+define double @trunc_unsigned_f64(double %x) {
+; CHECK-LABEL: trunc_unsigned_f64:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fcvtzu x8, d0
+; CHECK-NEXT:    ucvtf d0, x8
+; CHECK-NEXT:    ret
+  %i = fptoui double %x to i64
+  %r = uitofp i64 %i to double
+  ret double %r
+}
+
+define float @trunc_signed_f32(float %x) {
+; CHECK-LABEL: trunc_signed_f32:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fcvtzs w8, s0
+; CHECK-NEXT:    scvtf s0, w8
+; CHECK-NEXT:    ret
+  %i = fptosi float %x to i32
+  %r = sitofp i32 %i to float
+  ret float %r
+}
+
+define double @trunc_signed_f64(double %x) {
+; CHECK-LABEL: trunc_signed_f64:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fcvtzs x8, d0
+; CHECK-NEXT:    scvtf d0, x8
+; CHECK-NEXT:    ret
+  %i = fptosi double %x to i64
+  %r = sitofp i64 %i to double
+  ret double %r
+}
+