[llvm] r328629 - [llvm-mca] pass the correct set of used registers in checkRAT.

[Andrea Di Biagio via llvm-commits]

Author: adibiagio
Date: Tue Mar 27 08:23:41 2018
New Revision: 328629

URL: http://llvm.org/viewvc/llvm-project?rev=328629&view=rev
Log:
[llvm-mca] pass the correct set of used registers in checkRAT.

We were incorrectly initializing the array of used registers in method checkRAT.
As a consequence, the number of register file stalls was misreported.

Added a test to cover this case.

Added:
    llvm/trunk/test/tools/llvm-mca/X86/BtVer2/register-files-3.s
Modified:
    llvm/trunk/tools/llvm-mca/Dispatch.cpp

Added: llvm/trunk/test/tools/llvm-mca/X86/BtVer2/register-files-3.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/BtVer2/register-files-3.s?rev=328629&view=auto
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/BtVer2/register-files-3.s (added)
+++ llvm/trunk/test/tools/llvm-mca/X86/BtVer2/register-files-3.s Tue Mar 27 08:23:41 2018
@@ -0,0 +1,33 @@
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -register-file-size=5 -iterations=2 -verbose -timeline < %s | FileCheck %s
+
+idiv %eax
+
+# CHECK:      Iterations:     2
+# CHECK-NEXT: Instructions:   2
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]	Instructions:
+# CHECK-NEXT:  2      25    25.00                 * 	idivl	%eax
+
+
+# CHECK: RAT     - Register unavailable:                      26
+
+# CHECK:       Register File statistics.
+# CHECK-NEXT:  Register File #0
+# CHECK-NEXT:    Total number of mappings created: 6
+# CHECK-NEXT:    Max number of mappings used:      3
+
+
+# CHECK:      Timeline view:
+# CHECK-NEXT:    	          0123456789          0123456789          01234
+# CHECK-NEXT: Index	0123456789          0123456789          0123456789     
+
+# CHECK:      [0,0]	DeeeeeeeeeeeeeeeeeeeeeeeeeER  .    .    .    .    .   .	idivl	%eax
+# CHECK:      [1,0]	.    .    .    .    .    . DeeeeeeeeeeeeeeeeeeeeeeeeeER	idivl	%eax

Modified: llvm/trunk/tools/llvm-mca/Dispatch.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/Dispatch.cpp?rev=328629&r1=328628&r2=328629&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/Dispatch.cpp (original)
+++ llvm/trunk/tools/llvm-mca/Dispatch.cpp Tue Mar 27 08:23:41 2018
@@ -274,9 +274,11 @@ void RetireControlUnit::dump() const {
 #endif
 
 bool DispatchUnit::checkRAT(unsigned Index, const Instruction &Instr) {
-  const InstrDesc &Desc = Instr.getDesc();
-  unsigned NumWrites = Desc.Writes.size();
-  unsigned RegisterMask = RAT->isAvailable(NumWrites);
+  SmallVector<unsigned, 4> RegDefs;
+  for (const std::unique_ptr<WriteState> &RegDef : Instr.getDefs())
+    RegDefs.emplace_back(RegDef->getRegisterID());
+
+  unsigned RegisterMask = RAT->isAvailable(RegDefs);
   // A mask with all zeroes means: register files are available.
   if (RegisterMask) {
     Owner->notifyStallEvent(