[PATCH] D44924: [X86] Add WriteFMOVMSK/WriteVecMOVMSK scheduler classes
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 27 06:23:16 PDT 2018
RKSimon created this revision.
RKSimon added reviewers: craig.topper, courbet, GGanesh, andreadb, spatel.
Currently MOVMSK instructions use the WriteVecLogic class, which is a very poor choice given that MOVMSK involves a SSE->GPR transfer.
This introduces WriteFMOVMSK/WriteVecMOVMSK scheduler classes instead.
SLM - Used Agner's values.
SB/HW/BW - Agner says that MMX_PMOVMSKBrr is the same as PMOVMSKBrr, so I've removed the override - is that OK?
ZN - VPMOVMSKB/VPMOVMSKBY has some weird values (VPMOVMSKB take 2 uops but VPMOVMSKBY takes 1uop???) - I've just used the VPMOVMSKB version and left VPMOVMSKBY as an override, but those values look weird. @GGanesh please can you comment?
Repository:
rL LLVM
https://reviews.llvm.org/D44924
Files:
lib/Target/X86/X86InstrMMX.td
lib/Target/X86/X86InstrSSE.td
lib/Target/X86/X86SchedBroadwell.td
lib/Target/X86/X86SchedHaswell.td
lib/Target/X86/X86SchedSandyBridge.td
lib/Target/X86/X86SchedSkylakeClient.td
lib/Target/X86/X86SchedSkylakeServer.td
lib/Target/X86/X86Schedule.td
lib/Target/X86/X86ScheduleBtVer2.td
lib/Target/X86/X86ScheduleSLM.td
lib/Target/X86/X86ScheduleZnver1.td
test/CodeGen/X86/avx2-schedule.ll
test/CodeGen/X86/mmx-schedule.ll
test/CodeGen/X86/sse-schedule.ll
test/CodeGen/X86/sse2-schedule.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D44924.139909.patch
Type: text/x-patch
Size: 16960 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180327/26b27603/attachment.bin>
More information about the llvm-commits
mailing list