[llvm] r328572 - [SLP] Add more checks to a test case. NFC.
Haicheng Wu via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 26 11:59:28 PDT 2018
Author: haicheng
Date: Mon Mar 26 11:59:28 2018
New Revision: 328572
URL: http://llvm.org/viewvc/llvm-project?rev=328572&view=rev
Log:
[SLP] Add more checks to a test case. NFC.
Modified:
llvm/trunk/test/Transforms/SLPVectorizer/AArch64/ext-trunc.ll
Modified: llvm/trunk/test/Transforms/SLPVectorizer/AArch64/ext-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SLPVectorizer/AArch64/ext-trunc.ll?rev=328572&r1=328571&r2=328572&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/SLPVectorizer/AArch64/ext-trunc.ll (original)
+++ llvm/trunk/test/Transforms/SLPVectorizer/AArch64/ext-trunc.ll Mon Mar 26 11:59:28 2018
@@ -12,6 +12,20 @@ define void @test(<4 x i16> %a, <4 x i16
; CHECK-NEXT: [[Z0:%.*]] = zext <4 x i16> [[A:%.*]] to <4 x i64>
; CHECK-NEXT: [[Z1:%.*]] = zext <4 x i16> [[B:%.*]] to <4 x i64>
; CHECK-NEXT: [[SUB0:%.*]] = sub nsw <4 x i64> [[Z0]], [[Z1]]
+; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x i64> [[SUB0]], i32 0
+; CHECK-NEXT: [[GEP0:%.*]] = getelementptr inbounds i64, i64* [[P:%.*]], i64 [[TMP0]]
+; CHECK-NEXT: [[LOAD0:%.*]] = load i64, i64* [[GEP0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i64> [[SUB0]], i32 1
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i64, i64* [[P]], i64 [[TMP1]]
+; CHECK-NEXT: [[LOAD1:%.*]] = load i64, i64* [[GEP1]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i64> [[SUB0]], i32 2
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i64, i64* [[P]], i64 [[TMP2]]
+; CHECK-NEXT: [[LOAD2:%.*]] = load i64, i64* [[GEP2]], align 4
+; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i64> [[SUB0]], i32 3
+; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds i64, i64* [[P]], i64 [[TMP3]]
+; CHECK-NEXT: [[LOAD3:%.*]] = load i64, i64* [[GEP3]], align 4
+; CHECK-NEXT: call void @foo(i64 [[LOAD0]], i64 [[LOAD1]], i64 [[LOAD2]], i64 [[LOAD3]])
+; CHECK-NEXT: ret void
;
entry:
%z0 = zext <4 x i16> %a to <4 x i32>
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