[PATCH] D40547: AMDGPU: Fix copying i1 value out of loop with non-uniform exit

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SILowerI1Copies.cpp:146
+              &AMDGPU::SGPR_64RegClass) &&
+            AMDGPU::laneDominates(DefInst->getParent(), &MBB)) {
           BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_B64))
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I think the info from the commit message needs to be added here


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Comment at: lib/Target/AMDGPU/Utils/AMDGPULaneDominator.cpp:52
+// The check is conservative, i.e. there can be false-negatives.
+bool laneDominates(MachineBasicBlock *A, MachineBasicBlock *B) {
+  // Check whether A is reachable from itself without going through B.
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We keep repeating essentially the same control flow depth first search in various places, but I don't have a better idea until we really fix the control flow situation


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Comment at: test/CodeGen/AMDGPU/i1-copy-from-loop.ll:1-2
+; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+
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s/SI/GCN


https://reviews.llvm.org/D40547