[PATCH] D44879: [X86] Add WriteBitScan/WriteLZCNT/WriteTZCNT/WritePOPCNT scheduler classes (PR36881)
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 25 10:18:08 PDT 2018
RKSimon created this revision.
RKSimon added reviewers: craig.topper, courbet, andreadb, GGanesh, spatel.
Give the bit count instructions their own scheduler classes instead of forcing them into existing classes.
These were mostly overriden anyway, but I had to add in costs from Agner for silvermont and znver1 and the Fam16h SoG for btver2 (Jaguar)
Repository:
rL LLVM
https://reviews.llvm.org/D44879
Files:
lib/Target/X86/X86InstrInfo.td
lib/Target/X86/X86InstrSSE.td
lib/Target/X86/X86SchedBroadwell.td
lib/Target/X86/X86SchedHaswell.td
lib/Target/X86/X86SchedSandyBridge.td
lib/Target/X86/X86SchedSkylakeClient.td
lib/Target/X86/X86SchedSkylakeServer.td
lib/Target/X86/X86Schedule.td
lib/Target/X86/X86ScheduleBtVer2.td
lib/Target/X86/X86ScheduleSLM.td
lib/Target/X86/X86ScheduleZnver1.td
test/CodeGen/X86/popcnt-schedule.ll
test/CodeGen/X86/schedule-x86_64.ll
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