[PATCH] D44851: [AArch64] Decorate AArch64 instrs with OPERAND_PCREL

[Rafael Auler via Phabricator via llvm-commits]

rafauler created this revision.
rafauler added reviewers: evandro, t.p.northover, espindola.
Herald added subscribers: llvm-commits, kristof.beyls, javed.absar, rengolin.

This is a canonical way to teach objdump to print the target
symbols for branches when disassembling AArch64 code.


Repository:
  rL LLVM

https://reviews.llvm.org/D44851

Files:
  lib/Target/AArch64/AArch64InstrFormats.td
  lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
  test/tools/llvm-objdump/AArch64/pc-rel-targets.test


Index: test/tools/llvm-objdump/AArch64/pc-rel-targets.test
===================================================================
--- /dev/null
+++ test/tools/llvm-objdump/AArch64/pc-rel-targets.test
@@ -0,0 +1,3 @@
+// RUN: llvm-objdump -d %p/Inputs/kextbundle.macho-aarch64 | FileCheck %s
+
+CHECK:  4008:       03 00 00 94     bl      #12 <_bar.stub>
Index: lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
===================================================================
--- lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
+++ lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
@@ -131,8 +131,29 @@
                                       IncrementalLinkerCompatible);
 }
 
+namespace {
+
+class AArch64MCInstrAnalysis : public MCInstrAnalysis {
+public:
+  AArch64MCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) {}
+
+  bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
+                      uint64_t &Target) const override {
+    if (Inst.getNumOperands() == 0 ||
+        Info->get(Inst.getOpcode()).OpInfo[0].OperandType !=
+            MCOI::OPERAND_PCREL)
+      return false;
+
+    int64_t Imm = Inst.getOperand(0).getImm() << 2;
+    Target = Addr + Imm;
+    return true;
+  }
+};
+
+} // end anonymous namespace
+
 static MCInstrAnalysis *createAArch64InstrAnalysis(const MCInstrInfo *Info) {
-  return new MCInstrAnalysis(Info);
+  return new AArch64MCInstrAnalysis(Info);
 }
 
 // Force static initialization.
Index: lib/Target/AArch64/AArch64InstrFormats.td
===================================================================
--- lib/Target/AArch64/AArch64InstrFormats.td
+++ lib/Target/AArch64/AArch64InstrFormats.td
@@ -1244,6 +1244,7 @@
   let DecoderMethod = "DecodePCRelLabel19";
   let PrintMethod = "printAlignedLabel";
   let ParserMatchClass = PCRelLabel19Operand;
+  let OperandType = "OPERAND_PCREL";
 }
 
 class BranchCond : I<(outs), (ins ccode:$cond, am_brcond:$target),
@@ -1299,6 +1300,7 @@
   let EncoderMethod = "getTestBranchTargetOpValue";
   let PrintMethod = "printAlignedLabel";
   let ParserMatchClass = BranchTarget14Operand;
+  let OperandType = "OPERAND_PCREL";
 }
 
 // AsmOperand classes to emit (or not) special diagnostics
@@ -1375,11 +1377,13 @@
   let EncoderMethod = "getBranchTargetOpValue";
   let PrintMethod = "printAlignedLabel";
   let ParserMatchClass = BranchTarget26Operand;
+  let OperandType = "OPERAND_PCREL";
 }
 def am_bl_target : Operand<i64> {
   let EncoderMethod = "getBranchTargetOpValue";
   let PrintMethod = "printAlignedLabel";
   let ParserMatchClass = BranchTarget26Operand;
+  let OperandType = "OPERAND_PCREL";
 }
 
 class BImm<bit op, dag iops, string asm, list<dag> pattern>
@@ -2667,6 +2671,7 @@
   let DecoderMethod = "DecodePCRelLabel19";
   let PrintMethod = "printAlignedLabel";
   let ParserMatchClass = PCRelLabel19Operand;
+  let OperandType = "OPERAND_PCREL";
 }
 
 let mayLoad = 1, mayStore = 0, hasSideEffects = 0 in


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