[llvm] r328309 - [X86][Znver1] Fix instregex entries that don't match any instructions (D44687)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 23 05:08:23 PDT 2018
Author: rksimon
Date: Fri Mar 23 05:08:23 2018
New Revision: 328309
URL: http://llvm.org/viewvc/llvm-project?rev=328309&view=rev
Log:
[X86][Znver1] Fix instregex entries that don't match any instructions (D44687)
Reviewed by @GGanesh and @craig.topper
Modified:
llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
Modified: llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td?rev=328309&r1=328308&r2=328309&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td Fri Mar 23 05:08:23 2018
@@ -367,8 +367,7 @@ def : InstRW<[WriteALULd],
// INC DEC NOT NEG.
// m.
def : InstRW<[WriteALULd],
- (instregex "(INC|DEC|NOT|NEG)(8|16|32|64)m",
- "(INC|DEC)64(16|32)m")>;
+ (instregex "(INC|DEC|NOT|NEG)(8|16|32|64)m")>;
// MUL IMUL.
// r16.
@@ -499,7 +498,7 @@ def ZnWriteRET : SchedWriteRes<[ZnALU03]
let NumMicroOps = 2;
}
def : InstRW<[ZnWriteRET], (instregex "RET(L|Q|W)", "LRET(L|Q|W)",
- "IRET(D|Q)", "RETF")>;
+ "IRET(16|32|64)")>;
//-- Logic instructions --//
@@ -913,7 +912,7 @@ def : InstRW<[ZnWriteFPU2], (instregex "
def : InstRW<[ZnWriteToALU2], (instregex "VMOVPQIto64rr")>;
// (x)mm <- r64.
-def : InstRW<[ZnWriteFPU2], (instregex "VMOV64toPQIrr", "VMOVZQI2PQIrr")>;
+def : InstRW<[ZnWriteFPU2], (instregex "VMOV64toPQIrr")>;
// (x)mm <- (x)mm.
def : InstRW<[ZnWriteFPU], (instregex "MMX_MOVQ64rr")>;
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