[PATCH] D25987: [X86] New pattern to generate PSUBUS from SELECT

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 22 10:36:35 PDT 2018


spatel added reviewers: craig.topper, tkrupa.
spatel added a comment.

In https://reviews.llvm.org/D25987#1028292, @yulia_koval wrote:

> In https://reviews.llvm.org/D25987#1005390, @spatel wrote:
>
> > Did https://reviews.llvm.org/D41480 affect anything with these tests? We still need to handle 'umin' patterns in IR and update the tests here with canonical IR forms to show psubus codegen?
>
>
> Looks like all possible umin patterns are already handled in existing patterns we added for max. The last tests in psubus.ll is also cannonical cmp-select-sub sequence. What should I add which is missing?


What does this comment in InstCombineSelect refer to?
/// TODO: Also support a - UMIN(a,b) patterns.

Also, there's a proposal to remove the intrinsics now - https://reviews.llvm.org/D44785. How does that relate to whatever is left to do here?


https://reviews.llvm.org/D25987





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