[PATCH] D44782: Account for partial stack slot spills (PR30821)

[Jeremy Morse via Phabricator via llvm-commits]

jmorse created this revision.
jmorse added reviewers: hfinkel, craig.topper.
Herald added a subscriber: llvm-commits.

Currently, _any_ store or load instruction is considered to be operating
on a spill if it has a frameindex as an operand, and thus are fair game
for optimisations such as "StackSlotColoring". This usually works, except
on architectures where spills can be partially restored, for example on
X86 where a spilt vector can have a single component loaded (zeroing the
rest of the target register). This can be mis-interpreted and the zero
extension unsoundly eliminated, see pr30821.

To avoid this, optionally provide the caller to isLoadFromStackSlot and
isStoreToStackSlot with the number of bytes spilt/loaded by the given
instruction. Optimisations can then determine that a full spill followed
by a partial load (or vice versa), for example, cannot necessarily be
commuted.

(Adds regression test too)


Repository:
  rL LLVM

https://reviews.llvm.org/D44782

Files:
  include/llvm/CodeGen/TargetInstrInfo.h
  lib/CodeGen/StackSlotColoring.cpp
  lib/Target/X86/X86InstrInfo.cpp
  lib/Target/X86/X86InstrInfo.h
  test/CodeGen/Generic/pr30821.ll

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