[PATCH] D44767: [ARM] Enable the full InstRW overlap check for ARMScheduleR52.td

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: lib/Target/ARM/ARMScheduleR52.td:223
 def : InstRW<[R52WriteALU_EX2, R52Read_EX1],
-      (instregex "MOV_ga_pcrel", "t2MOV_ga_pcrel")>;
+      (instregex "MOV_ga_pcrel$", "t2MOV_ga_pcrel$")>;
 def : InstRW<[R52WriteLd,R52Read_ISS],
----------------
Without the $ these also matched _ldr version below


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Comment at: lib/Target/ARM/ARMScheduleR52.td:515
 def : InstRW<[R52WriteLd],
-      (instregex "t?LDRLIT_ga_abs", "t?LDRLIT_ga_pcrel")>;
+      (instregex "t?LDRLIT_ga_abs", "t?LDRLIT_ga_pcrel$")>;
 // LDRLIT_ga_pcrel_ldr expands to LDR + PICLDR
----------------
Was matching _ldr as well.


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Comment at: lib/Target/ARM/ARMScheduleR52.td:533
 
-def : InstRW<[R52WriteFPALU_F5, R52Read_F1, R52Read_F1], (instregex "(VADD|VSUB)(D|S|H|fd|hd)")>;
+def : InstRW<[R52WriteFPALU_F5, R52Read_F1, R52Read_F1], (instregex "(VADD|VSUB)(D|S|H|fd|hd)$")>;
 def : InstRW<[R52Write2FPALU_F5, R52Read_F1, R52Read_F1], (instregex "(VADD|VSUB)(fq|hq)")>;
----------------
This was matching VADDHNv2i32 and similar instructions which are already matched on line 780



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Comment at: lib/Target/ARM/ARMScheduleR52.td:798
 
-def : InstRW<[R52Write2FPALU_F3, R52Read_F2], (instregex "VBICi(v8i16|v4i32)")>;
-
----------------
This exact line appeard 5 lines above.


https://reviews.llvm.org/D44767