[PATCH] D44718: [AMDGPU] Define code object identification string used in AMDHSA runtimes.
Tony Tye via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 20 16:18:25 PDT 2018
t-tye created this revision.
t-tye added reviewers: kzhuravl, b-sumner.
Herald added subscribers: tpr, dstuttard, yaxunl, nhaehnle, wdng.
https://reviews.llvm.org/D44718
Files:
docs/AMDGPUUsage.rst
Index: docs/AMDGPUUsage.rst
===================================================================
--- docs/AMDGPUUsage.rst
+++ docs/AMDGPUUsage.rst
@@ -912,6 +912,28 @@
.. _amdgpu-amdhsa-hsa-code-object-metadata:
+Code Object Target Identification
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The AMDHSA OS uses the following syntax to specify the code object
+target as a single string:
+
+ ``<Architecture>-<Vendor>-<OS>-<Environment>-<Processor>-<Target Features>``
+
+Where the first four components are the same as the *Target Triple*
+(see :ref:`amdgpu-target-triples`), the next component is the same as
+the *Processor* (see :ref:`amdgpu-processors`) and the last component
+is a hyphen separated list of the enabled *Target Features* that apply
+to *Processor* in the same order as listed in the table
+:ref:`amdgpu-target-feature-table` (see
+:ref:`amdgpu-target-features`). Note that *Target Features* must be
+included in the list if they are enabled even if that is the default for
+*Processor*.
+
+For example:
+
+ ``"amdgcn-amd-amdhsa--gfx902-xnack"``
+
Code Object Metadata
~~~~~~~~~~~~~~~~~~~~
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D44718.139220.patch
Type: text/x-patch
Size: 1115 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180320/a61a3cf3/attachment.bin>
More information about the llvm-commits
mailing list