[PATCH] D44647: [X86] Add WriteCRC32 scheduler class

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

In https://reviews.llvm.org/D44647#1042327, @craig.topper wrote:

> Do any instructions on Sandybridge have a Custom load latency of 4? Looks like the most basic instruction like ADD32rr vs ADD32rm has a difference of 5 cycles.


You're right - +5 is probably the best option - I'll see what happens if I alter the default.


Repository:
  rL LLVM

https://reviews.llvm.org/D44647