[llvm] r327862 - [CodeGen] Avoid handling DBG_VALUE in the LivePhysRegs (addUses, removeDefs, stepForward)
Matt Davis via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 19 09:06:40 PDT 2018
Author: mattd
Date: Mon Mar 19 09:06:40 2018
New Revision: 327862
URL: http://llvm.org/viewvc/llvm-project?rev=327862&view=rev
Log:
[CodeGen] Avoid handling DBG_VALUE in the LivePhysRegs (addUses,removeDefs,stepForward)
Summary:
This patch prevents DBG_VALUE instructions from influencing
LivePhysRegs::stepBackwards and stepForwards. In at least one case,
specifically branch folding, the stepBackwards logic was having an
influence on code generation. The result was that certain code
compiled with '-g -O2' would differ from that compiled with '-O2'
alone. It seems that the original logic, accounting for DBG_VALUE,
was influencing the placement of an IMPLICIT_DEF which had a later
impact on how blocks were processed in branch folding.
Reviewers: kparzysz, MatzeB
Reviewed By: kparzysz
Subscribers: bjope, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D43850
Added:
llvm/trunk/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
Modified:
llvm/trunk/lib/CodeGen/LivePhysRegs.cpp
Modified: llvm/trunk/lib/CodeGen/LivePhysRegs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LivePhysRegs.cpp?rev=327862&r1=327861&r2=327862&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LivePhysRegs.cpp (original)
+++ llvm/trunk/lib/CodeGen/LivePhysRegs.cpp Mon Mar 19 09:06:40 2018
@@ -44,7 +44,7 @@ void LivePhysRegs::removeRegsInMask(cons
void LivePhysRegs::removeDefs(const MachineInstr &MI) {
for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
if (O->isReg()) {
- if (!O->isDef())
+ if (!O->isDef() || O->isDebug())
continue;
unsigned Reg = O->getReg();
if (!TargetRegisterInfo::isPhysicalRegister(Reg))
@@ -58,7 +58,7 @@ void LivePhysRegs::removeDefs(const Mach
/// Add uses to the set.
void LivePhysRegs::addUses(const MachineInstr &MI) {
for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
- if (!O->isReg() || !O->readsReg())
+ if (!O->isReg() || !O->readsReg() || O->isDebug())
continue;
unsigned Reg = O->getReg();
if (!TargetRegisterInfo::isPhysicalRegister(Reg))
@@ -85,7 +85,7 @@ void LivePhysRegs::stepForward(const Mac
SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
// Remove killed registers from the set.
for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
- if (O->isReg()) {
+ if (O->isReg() && !O->isDebug()) {
unsigned Reg = O->getReg();
if (!TargetRegisterInfo::isPhysicalRegister(Reg))
continue;
Added: llvm/trunk/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir?rev=327862&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir (added)
+++ llvm/trunk/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir Mon Mar 19 09:06:40 2018
@@ -0,0 +1,213 @@
+# RUN: llc -run-pass=block-placement %s -o - | FileCheck %s
+
+--- |
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+
+ define void @_Z3fn1v() !dbg !6 {
+ entry:
+ %d = alloca i8, align 1
+ br i1 1, label %for.cond.cleanup, label %for.body
+
+ for.cond.cleanup:
+ ret void
+
+ for.body:
+ br i1 1, label %for.cond.cleanup, label %for.body.1
+
+ for.body.1:
+ br i1 1, label %for.cond.cleanup, label %for.body.2
+
+ for.body.2:
+ br i1 1, label %for.cond.cleanup, label %for.body.3
+
+ for.body.3:
+ br i1 1, label %for.cond.cleanup, label %for.body.4
+
+ for.body.4:
+ br i1 1, label %for.cond.cleanup, label %for.body.5
+
+ for.body.5:
+ br i1 1, label %for.cond.cleanup, label %for.body.6
+
+ for.body.6:
+ br i1 1, label %for.cond.cleanup, label %for.body.7
+
+ for.body.7:
+ br i1 1, label %for.cond.cleanup, label %for.body.8
+
+ for.body.8:
+ br i1 1, label %for.cond.cleanup, label %for.body.9
+
+ for.body.9:
+ br i1 1, label %for.cond.cleanup, label %for.body.10
+
+ for.body.10:
+ br i1 1, label %for.cond.cleanup, label %for.body.11
+
+ for.body.11:
+ %d.0.d.0..12 = load volatile i8, i8* %d, align 1
+ call void @llvm.dbg.value(metadata i8 %d.0.d.0..12, metadata !16, metadata !DIExpression()), !dbg !19
+ br label %for.cond.cleanup
+ }
+
+ declare void @llvm.dbg.value(metadata, metadata, metadata)
+
+ !llvm.dbg.cu = !{!0}
+ !llvm.module.flags = !{!3, !4, !5}
+
+ !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 7.0.0 (trunk 326606)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, globals: !2)
+ !1 = !DIFile(filename: "repro.cpp", directory: "/home/mdavis/bugs/bz-189869")
+ !2 = !{}
+ !3 = !{i32 2, !"Dwarf Version", i32 4}
+ !4 = !{i32 2, !"Debug Info Version", i32 3}
+ !5 = !{i32 1, !"wchar_size", i32 4}
+ !6 = distinct !DISubprogram(name: "fn1", linkageName: "_Z3fn1v", scope: !7, file: !7, line: 4, type: !8, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: true, unit: !0, variables: !15)
+ !7 = !DIFile(filename: "./repro.cpp", directory: "/home/mdavis/bugs/bz-189869")
+ !8 = !DISubroutineType(types: !9)
+ !9 = !{}
+ !15 = !{!16}
+ !16 = !DILocalVariable(name: "d", scope: !6, file: !7, line: 6, type: !17)
+ !17 = !DIDerivedType(tag: DW_TAG_volatile_type, baseType: !18)
+ !18 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char)
+ !19 = !DILocation(line: 6, column: 17, scope: !6)
+
+...
+---
+# CHECK: name: _Z3fn1v
+# CHECK: bb.10.for.body.9
+# CHECK: renamable $al
+# CHECK-NEXT: TEST8rr killed renamable $al
+# CHECK-NEXT: JNE_1
+# CHECK-NOT: $al = IMPLICIT_DEF
+# CHECK: bb.12.for.body.10
+
+name: _Z3fn1v
+alignment: 4
+tracksRegLiveness: true
+constants:
+body: |
+ bb.0.entry:
+ successors: %bb.1, %bb.4
+ liveins: $rdi, $rbp, $r15, $r14, $r13, $r12, $rbx
+
+ renamable $al = MOV8ri 1
+ TEST8rr renamable $al, renamable $al, implicit-def $eflags
+ JNE_1 %bb.4, implicit killed $eflags
+
+ bb.1.for.cond.cleanup:
+ successors: %bb.3, %bb.2
+ liveins: $ecx, $rdi
+
+ renamable $eax = MOV32rm $rsp, 1, $noreg, -16, $noreg
+ CMP32rm killed renamable $eax, $rip, 1, $noreg, $noreg, $noreg, implicit-def $eflags
+ JBE_1 %bb.3, implicit $eflags
+
+ bb.2:
+ successors: %bb.3
+ liveins: $ebp, $ebx, $edx, $esi, $rdi, $r8d, $r9d, $r10d, $r11d, $r12d, $r13d, $r14d, $r15d
+
+ bb.3.for.cond.cleanup:
+ liveins: $rdi, $xmm3, $xmm4, $xmm5, $xmm6, $xmm7, $xmm9, $xmm13, $xmm14
+ RETQ
+
+ bb.4.for.body:
+ successors: %bb.1, %bb.5
+ liveins: $al, $rdi
+
+ renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
+ TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
+ JNE_1 %bb.1, implicit $eflags
+
+ bb.5.for.body.1:
+ successors: %bb.1, %bb.6
+ liveins: $ecx, $rdi
+
+ renamable $al = MOV8ri 1
+ TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
+ JNE_1 %bb.1, implicit $eflags
+
+ bb.6.for.body.2:
+ successors: %bb.1, %bb.7
+ liveins: $ecx, $eflags, $rdi
+
+ JNE_1 %bb.1, implicit $eflags
+
+ bb.7.for.body.3:
+ successors: %bb.1, %bb.8
+ liveins: $ecx, $rdi
+
+ renamable $al = MOV8ri 1
+ TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
+ JNE_1 %bb.1, implicit $eflags
+
+ bb.8.for.body.4:
+ successors: %bb.1, %bb.9
+ liveins: $ecx, $eflags, $rdi
+
+ JNE_1 %bb.1, implicit $eflags
+
+ bb.9.for.body.5:
+ successors: %bb.1, %bb.10
+ liveins: $ecx, $rdi
+
+ renamable $al = MOV8ri 1
+ TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
+ JNE_1 %bb.1, implicit $eflags
+
+ bb.10.for.body.6:
+ successors: %bb.1, %bb.11
+ liveins: $ecx, $eflags, $rdi
+
+ JNE_1 %bb.1, implicit $eflags
+
+ bb.11.for.body.7:
+ successors: %bb.1, %bb.12
+ liveins: $ecx, $rdi
+
+ renamable $al = MOV8ri 1
+ TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
+ JNE_1 %bb.1, implicit $eflags
+
+ bb.12.for.body.8:
+ successors: %bb.1, %bb.13
+ liveins: $ecx, $eflags, $rdi
+
+ JNE_1 %bb.1, implicit $eflags
+
+ bb.13.for.body.9:
+ successors: %bb.14, %bb.15
+ liveins: $rdi
+
+ renamable $al = MOV8ri 1
+ TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
+ JE_1 %bb.15, implicit $eflags
+
+ bb.14:
+ successors: %bb.1
+ liveins: $rdi
+
+ renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
+ JMP_1 %bb.1
+
+ bb.15.for.body.10:
+ successors: %bb.16, %bb.17
+ liveins: $eflags, $rdi
+
+ JE_1 %bb.17, implicit killed $eflags
+
+ bb.16:
+ successors: %bb.1
+ liveins: $rdi
+
+ JMP_1 %bb.1
+
+ bb.17.for.body.11:
+ successors: %bb.1
+ liveins: $rdi
+
+ dead renamable $al = MOV8rm $rsp, 1, $noreg, -121, $noreg
+ DBG_VALUE debug-use $al, debug-use $noreg, !16, !DIExpression(), debug-location !19
+ renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
+ JMP_1 %bb.1
+...
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