[llvm] r327814 - [AVR] Lower i128 divisions to runtime library calls

[Dylan McKay via llvm-commits]

Author: dylanmckay
Date: Sun Mar 18 17:55:50 2018
New Revision: 327814

URL: http://llvm.org/viewvc/llvm-project?rev=327814&view=rev
Log:
[AVR] Lower i128 divisions to runtime library calls

This patch adds i128 division support by instruction LLVM to lower
128-bit divisions to the __udivmodti4 and __divmodti4 rtlib functions.

This also adds test for 64-bit division and 128-bit division.

Patch by Peter Nimmervoll.

Modified:
    llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp
    llvm/trunk/test/CodeGen/AVR/div.ll

Modified: llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp?rev=327814&r1=327813&r2=327814&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp Sun Mar 18 17:55:50 2018
@@ -345,6 +345,9 @@ SDValue AVRTargetLowering::LowerDivRem(S
   case MVT::i64:
     LC = IsSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64;
     break;
+  case MVT::i128:
+    LC = IsSigned ? RTLIB::SDIVREM_I128 : RTLIB::UDIVREM_I128;
+    break;
   }
 
   SDValue InChain = DAG.getEntryNode();

Modified: llvm/trunk/test/CodeGen/AVR/div.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AVR/div.ll?rev=327814&r1=327813&r2=327814&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AVR/div.ll (original)
+++ llvm/trunk/test/CodeGen/AVR/div.ll Sun Mar 18 17:55:50 2018
@@ -62,3 +62,55 @@ define i32 @sdiv32(i32 %a, i32 %b) {
   ret i32 %quot
 }
 
+; Unsigned 64-bit division
+define i64 @udiv64(i64 %a, i64 %b) {
+; CHECK-LABEL: udiv64:
+; CHECK: call __udivmoddi4
+; CHECK-NEXT: ldd r18, Y+1
+; CHECK-NEXT: ldd r19, Y+2
+; CHECK-NEXT: ldd r20, Y+3
+; CHECK-NEXT: ldd r21, Y+4
+; CHECK-NEXT: ldd r22, Y+5
+; CHECK-NEXT: ldd r23, Y+6
+; CHECK-NEXT: ldd r24, Y+7
+; CHECK-NEXT: ldd r25, Y+8
+; CHECK: ret
+  %quot = udiv i64 %a, %b
+  ret i64 %quot
+}
+
+; Signed 64-bit division
+define i64 @sdiv64(i64 %a, i64 %b) {
+; CHECK-LABEL: sdiv64:
+; CHECK: call __divmoddi4
+; CHECK-NEXT: ldd r18, Y+1
+; CHECK-NEXT: ldd r19, Y+2
+; CHECK-NEXT: ldd r20, Y+3
+; CHECK-NEXT: ldd r21, Y+4
+; CHECK-NEXT: ldd r22, Y+5
+; CHECK-NEXT: ldd r23, Y+6
+; CHECK-NEXT: ldd r24, Y+7
+; CHECK-NEXT: ldd r25, Y+8
+; CHECK: ret
+  %quot = sdiv i64 %a, %b
+  ret i64 %quot
+}
+
+; Unsigned 128-bit division
+define i128 @udiv128(i128 %a, i128 %b) {
+; CHECK-LABEL: udiv128:
+; CHECK: call __udivmodti4
+; CHECK: ret
+  %quot = udiv i128 %a, %b
+  ret i128 %quot
+}
+
+; Signed 128-bit division
+define i128 @sdiv128(i128 %a, i128 %b) {
+; CHECK-LABEL: sdiv128:
+; CHECK: call __divmodti4
+; CHECK: ret
+  %quot = sdiv i128 %a, %b
+  ret i128 %quot
+}
+