[llvm] r327801 - [X86][Btver2] F16C instructions are performed on the JSTC functional pipe

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Mar 18 08:59:51 PDT 2018


Author: rksimon
Date: Sun Mar 18 08:59:51 2018
New Revision: 327801

URL: http://llvm.org/viewvc/llvm-project?rev=327801&view=rev
Log:
[X86][Btver2] F16C instructions are performed on the JSTC functional pipe

Modified:
    llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
    llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-f16c.s

Modified: llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td?rev=327801&r1=327800&r2=327801&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td Sun Mar 18 08:59:51 2018
@@ -416,45 +416,45 @@ def : InstRW<[JWriteINSERTQ], (instrs IN
 // F16C instructions.
 ////////////////////////////////////////////////////////////////////////////////
 
-def JWriteCVT3: SchedWriteRes<[JFPU1]> {
+def JWriteCVT3: SchedWriteRes<[JFPU1, JSTC]> {
   let Latency = 3;
 }
 def : InstRW<[JWriteCVT3], (instrs VCVTPS2PHrr, VCVTPH2PSrr)>;
 
-def JWriteCVT3St: SchedWriteRes<[JFPU1, JSAGU]> {
+def JWriteCVT3St: SchedWriteRes<[JFPU1, JSTC, JSAGU]> {
   let Latency = 3;
 }
 def : InstRW<[JWriteCVT3St], (instrs VCVTPS2PHmr)>;
 
-def JWriteCVT3Ld: SchedWriteRes<[JLAGU, JFPU1]> {
+def JWriteCVT3Ld: SchedWriteRes<[JLAGU, JFPU1, JSTC]> {
   let Latency = 8;
 }
 def : InstRW<[JWriteCVT3Ld], (instrs VCVTPH2PSrm)>;
 
-def JWriteCVTPS2PHY: SchedWriteRes<[JFPU1, JFPU01]> {
+def JWriteCVTPS2PHY: SchedWriteRes<[JFPU1, JSTC, JFPX]> {
   let Latency = 6;
-  let ResourceCycles = [2, 2];
+  let ResourceCycles = [2, 2, 2];
   let NumMicroOps = 3;
 }
 def : InstRW<[JWriteCVTPS2PHY], (instrs VCVTPS2PHYrr)>;
 
-def JWriteCVTPS2PHYSt: SchedWriteRes<[JFPU1, JFPU01, JSAGU]> {
+def JWriteCVTPS2PHYSt: SchedWriteRes<[JFPU1, JSTC, JFPX, JSAGU]> {
   let Latency = 11;
-  let ResourceCycles = [2, 2, 1];
+  let ResourceCycles = [2, 2, 2, 1];
   let NumMicroOps = 3;
 }
 def : InstRW<[JWriteCVTPS2PHYSt], (instrs VCVTPS2PHYmr)>;
 
-def JWriteCVTPH2PSY: SchedWriteRes<[JFPU1]> {
+def JWriteCVTPH2PSY: SchedWriteRes<[JFPU1, JSTC]> {
   let Latency = 3;
-  let ResourceCycles = [2];
+  let ResourceCycles = [2, 2];
   let NumMicroOps = 2;
 }
 def : InstRW<[JWriteCVTPH2PSY], (instrs VCVTPH2PSYrr)>;
 
-def JWriteCVTPH2PSYLd: SchedWriteRes<[JLAGU, JFPU1]> {
+def JWriteCVTPH2PSYLd: SchedWriteRes<[JLAGU, JFPU1, JSTC]> {
   let Latency = 8;
-  let ResourceCycles = [1, 2];
+  let ResourceCycles = [1, 2, 2];
   let NumMicroOps = 2;
 }
 def : InstRW<[JWriteCVTPH2PSYLd], (instrs VCVTPH2PSYrm)>;

Modified: llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-f16c.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-f16c.s?rev=327801&r1=327800&r2=327801&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-f16c.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-f16c.s Sun Mar 18 08:59:51 2018
@@ -30,11 +30,11 @@ vcvtps2ph   $0, %ymm0, (%rax)
 
 # CHECK:      Resource pressure by instruction:
 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   	Instructions:
-# CHECK-NEXT:  -      -      -      -      -      -     1.00    -      -      -      -      -      -      -     	vcvtph2ps	%xmm0, %xmm2
-# CHECK-NEXT:  -      -      -      -      -      -     1.00   1.00    -      -      -      -      -      -     	vcvtph2ps	(%rax), %xmm2
-# CHECK-NEXT:  -      -      -      -      -      -     2.00    -      -      -      -      -      -      -     	vcvtph2ps	%xmm0, %ymm2
-# CHECK-NEXT:  -      -      -      -      -      -     2.00   1.00    -      -      -      -      -      -     	vcvtph2ps	(%rax), %ymm2
-# CHECK-NEXT:  -      -      -      -      -      -     1.00    -      -      -      -      -      -      -     	vcvtps2ph	$0, %xmm0, %xmm2
-# CHECK-NEXT:  -      -      -      -      -      -     1.00    -      -     1.00    -      -      -      -     	vcvtps2ph	$0, %xmm0, (%rax)
-# CHECK-NEXT:  -      -      -      -      -     2.00   2.00    -      -      -      -      -      -      -     	vcvtps2ph	$0, %ymm0, %xmm2
-# CHECK-NEXT:  -      -      -      -      -     2.00   2.00    -      -     1.00    -      -      -      -     	vcvtps2ph	$0, %ymm0, (%rax)
+# CHECK-NEXT:  -      -      -      -      -      -     1.00    -      -      -     1.00    -      -      -     	vcvtph2ps	%xmm0, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -     1.00   1.00    -      -     1.00    -      -      -     	vcvtph2ps	(%rax), %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -     2.00    -      -      -     2.00    -      -      -     	vcvtph2ps	%xmm0, %ymm2
+# CHECK-NEXT:  -      -      -      -      -      -     2.00   1.00    -      -     2.00    -      -      -     	vcvtph2ps	(%rax), %ymm2
+# CHECK-NEXT:  -      -      -      -      -      -     1.00    -      -      -     1.00    -      -      -     	vcvtps2ph	$0, %xmm0, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -     1.00    -      -     1.00   1.00    -      -      -     	vcvtps2ph	$0, %xmm0, (%rax)
+# CHECK-NEXT:  -      -      -     1.80   0.20    -     2.00    -      -      -     2.00    -      -      -     	vcvtps2ph	$0, %ymm0, %xmm2
+# CHECK-NEXT:  -      -      -     0.20   1.80    -     2.00    -      -     1.00   2.00    -      -      -     	vcvtps2ph	$0, %ymm0, (%rax)




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