[llvm] r327787 - [X86] Fix a bunch of overlapping regular expressions in the scheduler models.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 18 01:38:06 PDT 2018
Author: ctopper
Date: Sun Mar 18 01:38:06 2018
New Revision: 327787
URL: http://llvm.org/viewvc/llvm-project?rev=327787&view=rev
Log:
[X86] Fix a bunch of overlapping regular expressions in the scheduler models.
Modified:
llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
llvm/trunk/lib/Target/X86/X86SchedHaswell.td
llvm/trunk/lib/Target/X86/X86SchedSandyBridge.td
llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td
llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td
llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
llvm/trunk/test/CodeGen/X86/avx-schedule.ll
llvm/trunk/test/CodeGen/X86/mmx-schedule.ll
llvm/trunk/test/CodeGen/X86/schedule-x86_32.ll
llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll
llvm/trunk/test/CodeGen/X86/x87-schedule.ll
Modified: llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedBroadwell.td?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedBroadwell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedBroadwell.td Sun Mar 18 01:38:06 2018
@@ -821,7 +821,6 @@ def BWWriteResGroup8 : SchedWriteRes<[BW
}
def: InstRW<[BWWriteResGroup8], (instregex "BLENDPDrri")>;
def: InstRW<[BWWriteResGroup8], (instregex "BLENDPSrri")>;
-def: InstRW<[BWWriteResGroup8], (instregex "MMX_MOVD64from64rr")>;
def: InstRW<[BWWriteResGroup8], (instregex "MMX_MOVQ64rr")>;
def: InstRW<[BWWriteResGroup8], (instregex "MMX_PANDNirr")>;
def: InstRW<[BWWriteResGroup8], (instregex "MMX_PANDirr")>;
@@ -878,7 +877,7 @@ def: InstRW<[BWWriteResGroup9], (instreg
def: InstRW<[BWWriteResGroup9], (instregex "CMP8i8")>;
def: InstRW<[BWWriteResGroup9], (instregex "CMP8ri")>;
def: InstRW<[BWWriteResGroup9], (instregex "CMP8rr")>;
-def: InstRW<[BWWriteResGroup9], (instregex "CWDE")>;
+def: InstRW<[BWWriteResGroup9], (instrs CWDE)>;
def: InstRW<[BWWriteResGroup9], (instregex "DEC(16|32|64)r")>;
def: InstRW<[BWWriteResGroup9], (instregex "DEC8r")>;
def: InstRW<[BWWriteResGroup9], (instregex "INC(16|32|64)r")>;
@@ -1125,7 +1124,7 @@ def BWWriteResGroup20 : SchedWriteRes<[B
def: InstRW<[BWWriteResGroup20], (instregex "ADC8i8")>;
def: InstRW<[BWWriteResGroup20], (instregex "ADC8ri")>;
def: InstRW<[BWWriteResGroup20], (instregex "CMOV(A|BE)(16|32|64)rr")>;
-def: InstRW<[BWWriteResGroup20], (instregex "CWD")>;
+def: InstRW<[BWWriteResGroup20], (instrs CWD)>;
def: InstRW<[BWWriteResGroup20], (instregex "JRCXZ")>;
def: InstRW<[BWWriteResGroup20], (instregex "SBB8i8")>;
def: InstRW<[BWWriteResGroup20], (instregex "SBB8ri")>;
@@ -1175,7 +1174,8 @@ def BWWriteResGroup25 : SchedWriteRes<[B
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
}
-def: InstRW<[BWWriteResGroup25], (instregex "PUSH(16|32|64)r(mr)?")>;
+def: InstRW<[BWWriteResGroup25], (instrs PUSH16r, PUSH32r, PUSH64r)>;
+def: InstRW<[BWWriteResGroup25], (instregex "PUSH(16|32|64)rmr")>;
def: InstRW<[BWWriteResGroup25], (instregex "PUSH64i8")>;
def: InstRW<[BWWriteResGroup25], (instregex "STOSB")>;
def: InstRW<[BWWriteResGroup25], (instregex "STOSL")>;
@@ -1663,7 +1663,6 @@ def BWWriteResGroup49 : SchedWriteRes<[B
let ResourceCycles = [1];
}
def: InstRW<[BWWriteResGroup49], (instregex "LDDQUrm")>;
-def: InstRW<[BWWriteResGroup49], (instregex "MMX_MOVD64from64rm")>;
def: InstRW<[BWWriteResGroup49], (instregex "MMX_MOVD64rm")>;
def: InstRW<[BWWriteResGroup49], (instregex "MMX_MOVD64to64rm")>;
def: InstRW<[BWWriteResGroup49], (instregex "MMX_MOVQ64rm")>;
@@ -2188,7 +2187,8 @@ def: InstRW<[BWWriteResGroup66], (instre
def: InstRW<[BWWriteResGroup66], (instregex "CMP8rm")>;
def: InstRW<[BWWriteResGroup66], (instregex "OR(16|32|64)rm")>;
def: InstRW<[BWWriteResGroup66], (instregex "OR8rm")>;
-def: InstRW<[BWWriteResGroup66], (instregex "POP(16|32|64)r(mr)?")>;
+def: InstRW<[BWWriteResGroup66], (instrs POP16r, POP32r, POP64r)>;
+def: InstRW<[BWWriteResGroup66], (instregex "POP(16|32|64)rmr")>;
def: InstRW<[BWWriteResGroup66], (instregex "SUB(16|32|64)rm")>;
def: InstRW<[BWWriteResGroup66], (instregex "SUB8rm")>;
def: InstRW<[BWWriteResGroup66], (instregex "TEST(16|32|64)mr")>;
@@ -2557,7 +2557,7 @@ def BWWriteResGroup90 : SchedWriteRes<[B
let NumMicroOps = 7;
let ResourceCycles = [2,2,1,2];
}
-def: InstRW<[BWWriteResGroup90], (instregex "LOOP")>;
+def: InstRW<[BWWriteResGroup90], (instrs LOOP)>;
def BWWriteResGroup91 : SchedWriteRes<[BWPort1,BWPort23]> {
let Latency = 8;
@@ -2762,13 +2762,8 @@ def BWWriteResGroup99 : SchedWriteRes<[B
}
def: InstRW<[BWWriteResGroup99], (instregex "ADC(16|32|64)mi")>;
def: InstRW<[BWWriteResGroup99], (instregex "ADC8mi")>;
-def: InstRW<[BWWriteResGroup99], (instregex "ADD8mi")>;
-def: InstRW<[BWWriteResGroup99], (instregex "AND8mi")>;
-def: InstRW<[BWWriteResGroup99], (instregex "OR8mi")>;
-def: InstRW<[BWWriteResGroup99], (instregex "SUB8mi")>;
def: InstRW<[BWWriteResGroup99], (instregex "XCHG(16|32|64)rm")>;
def: InstRW<[BWWriteResGroup99], (instregex "XCHG8rm")>;
-def: InstRW<[BWWriteResGroup99], (instregex "XOR8mi")>;
def BWWriteResGroup100 : SchedWriteRes<[BWPort4,BWPort23,BWPort237,BWPort06,BWPort0156]> {
let Latency = 8;
@@ -3176,8 +3171,8 @@ def BWWriteResGroup133 : SchedWriteRes<[
let NumMicroOps = 11;
let ResourceCycles = [2,9];
}
-def: InstRW<[BWWriteResGroup133], (instregex "LOOPE")>;
-def: InstRW<[BWWriteResGroup133], (instregex "LOOPNE")>;
+def: InstRW<[BWWriteResGroup133], (instrs LOOPE)>;
+def: InstRW<[BWWriteResGroup133], (instrs LOOPNE)>;
def BWWriteResGroup134 : SchedWriteRes<[BWPort5,BWPort23]> {
let Latency = 12;
@@ -3399,7 +3394,7 @@ def BWWriteResGroup159 : SchedWriteRes<[
let ResourceCycles = [1,1,1,5];
}
def: InstRW<[BWWriteResGroup159], (instregex "CPUID")>;
-def: InstRW<[BWWriteResGroup159], (instregex "RDTSC")>;
+def: InstRW<[BWWriteResGroup159], (instrs RDTSC)>;
def BWWriteResGroup160 : SchedWriteRes<[BWPort1,BWPort23,BWPort237,BWPort06,BWPort15,BWPort0156]> {
let Latency = 18;
@@ -3664,7 +3659,7 @@ def BWWriteResGroup186 : SchedWriteRes<[
let NumMicroOps = 28;
let ResourceCycles = [1,6,1,1,19];
}
-def: InstRW<[BWWriteResGroup186], (instregex "XSAVE(OPT)?")>;
+def: InstRW<[BWWriteResGroup186], (instregex "^XSAVE$", "XSAVEC", "XSAVES", "XSAVEOPT")>;
def BWWriteResGroup187 : SchedWriteRes<[BWPort01,BWPort15,BWPort015,BWPort0156]> {
let Latency = 31;
@@ -3736,7 +3731,7 @@ def BWWriteResGroup196 : SchedWriteRes<[
let NumMicroOps = 22;
let ResourceCycles = [2,20];
}
-def: InstRW<[BWWriteResGroup196], (instregex "RDTSCP")>;
+def: InstRW<[BWWriteResGroup196], (instrs RDTSCP)>;
def BWWriteResGroup197 : SchedWriteRes<[BWPort0,BWPort01,BWPort23,BWPort05,BWPort06,BWPort015,BWPort0156]> {
let Latency = 60;
@@ -3750,14 +3745,14 @@ def BWWriteResGroup198 : SchedWriteRes<[
let NumMicroOps = 88;
let ResourceCycles = [4,4,31,1,2,1,45];
}
-def: InstRW<[BWWriteResGroup198], (instregex "FXRSTOR64")>;
+def: InstRW<[BWWriteResGroup198], (instrs FXRSTOR64)>;
def BWWriteResGroup199 : SchedWriteRes<[BWPort0,BWPort6,BWPort23,BWPort05,BWPort06,BWPort15,BWPort0156]> {
let Latency = 63;
let NumMicroOps = 90;
let ResourceCycles = [4,2,33,1,2,1,47];
}
-def: InstRW<[BWWriteResGroup199], (instregex "FXRSTOR")>;
+def: InstRW<[BWWriteResGroup199], (instrs FXRSTOR)>;
def BWWriteResGroup200 : SchedWriteRes<[BWPort5,BWPort01,BWPort0156]> {
let Latency = 75;
Modified: llvm/trunk/lib/Target/X86/X86SchedHaswell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedHaswell.td?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedHaswell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedHaswell.td Sun Mar 18 01:38:06 2018
@@ -283,18 +283,6 @@ def : WriteRes<WriteNop, []>;
// Starting with P0.
def WriteP0 : SchedWriteRes<[HWPort0]>;
-def WriteP0_P1_Lat4 : SchedWriteRes<[HWPort0, HWPort1]> {
- let Latency = 4;
- let NumMicroOps = 2;
- let ResourceCycles = [1, 1];
-}
-
-def WriteP0_P1_Lat4Ld : SchedWriteRes<[HWPort0, HWPort1, HWPort23]> {
- let Latency = 8;
- let NumMicroOps = 3;
- let ResourceCycles = [1, 1, 1];
-}
-
def WriteP01 : SchedWriteRes<[HWPort01]>;
def Write2P01 : SchedWriteRes<[HWPort01]> {
@@ -304,25 +292,6 @@ def Write3P01 : SchedWriteRes<[HWPort01]
let NumMicroOps = 3;
}
-def WriteP015 : SchedWriteRes<[HWPort015]>;
-
-def WriteP01_P5 : SchedWriteRes<[HWPort01, HWPort5]> {
- let NumMicroOps = 2;
-}
-def WriteP06 : SchedWriteRes<[HWPort06]>;
-
-def Write2P06 : SchedWriteRes<[HWPort06]> {
- let Latency = 1;
- let NumMicroOps = 2;
- let ResourceCycles = [2];
-}
-
-def Write3P06_Lat2 : SchedWriteRes<[HWPort06]> {
- let Latency = 2;
- let NumMicroOps = 3;
- let ResourceCycles = [3];
-}
-
def WriteP0156_P23 : SchedWriteRes<[HWPort0156, HWPort23]> {
let NumMicroOps = 2;
}
@@ -332,98 +301,19 @@ def Write2P0156_P23 : SchedWriteRes<[HWP
let ResourceCycles = [2, 1];
}
-def Write2P0156_Lat2 : SchedWriteRes<[HWPort0156]> {
- let Latency = 2;
- let ResourceCycles = [2];
-}
-def Write2P0156_Lat2Ld : SchedWriteRes<[HWPort0156, HWPort23]> {
- let Latency = 6;
- let ResourceCycles = [2, 1];
-}
-
def Write5P0156 : SchedWriteRes<[HWPort0156]> {
let NumMicroOps = 5;
let ResourceCycles = [5];
}
-def WriteP0156_2P237_P4 : SchedWriteRes<[HWPort0156, HWPort237, HWPort4]> {
- let Latency = 1;
- let ResourceCycles = [1, 2, 1];
-}
-
-def Write2P0156_2P237_P4 : SchedWriteRes<[HWPort0156, HWPort237, HWPort4]> {
- let Latency = 1;
- let ResourceCycles = [2, 2, 1];
-}
-
-def Write3P0156_2P237_P4 : SchedWriteRes<[HWPort0156, HWPort237, HWPort4]> {
- let Latency = 1;
- let ResourceCycles = [3, 2, 1];
-}
-
// Starting with P1.
def WriteP1 : SchedWriteRes<[HWPort1]>;
-def WriteP1_P23 : SchedWriteRes<[HWPort1, HWPort23]> {
- let NumMicroOps = 2;
-}
-def WriteP1_Lat3 : SchedWriteRes<[HWPort1]> {
- let Latency = 3;
-}
-def WriteP1_Lat3Ld : SchedWriteRes<[HWPort1, HWPort23]> {
- let Latency = 7;
-}
def Write2P1 : SchedWriteRes<[HWPort1]> {
let NumMicroOps = 2;
let ResourceCycles = [2];
}
-def Write2P1_P23 : SchedWriteRes<[HWPort1, HWPort23]> {
- let NumMicroOps = 3;
- let ResourceCycles = [2, 1];
-}
-def WriteP15 : SchedWriteRes<[HWPort15]>;
-def WriteP15Ld : SchedWriteRes<[HWPort15, HWPort23]> {
- let Latency = 4;
-}
-
-def WriteP1_P5_Lat4 : SchedWriteRes<[HWPort1, HWPort5]> {
- let Latency = 4;
- let NumMicroOps = 2;
- let ResourceCycles = [1, 1];
-}
-
-def WriteP1_P5_Lat4Ld : SchedWriteRes<[HWPort1, HWPort5, HWPort23]> {
- let Latency = 8;
- let NumMicroOps = 3;
- let ResourceCycles = [1, 1, 1];
-}
-
-def WriteP1_P5_Lat6 : SchedWriteRes<[HWPort1, HWPort5]> {
- let Latency = 6;
- let NumMicroOps = 2;
- let ResourceCycles = [1, 1];
-}
-
-def WriteP1_P5_Lat6Ld : SchedWriteRes<[HWPort1, HWPort5, HWPort23]> {
- let Latency = 10;
- let NumMicroOps = 3;
- let ResourceCycles = [1, 1, 1];
-}
-
-// Starting with P2.
-def Write2P237_P4 : SchedWriteRes<[HWPort237, HWPort4]> {
- let Latency = 1;
- let ResourceCycles = [2, 1];
-}
-
-// Starting with P5.
-def WriteP5 : SchedWriteRes<[HWPort5]>;
-def WriteP5Ld : SchedWriteRes<[HWPort5, HWPort23]> {
- let Latency = 5;
- let NumMicroOps = 2;
- let ResourceCycles = [1, 1];
-}
// Notation:
// - r: register.
@@ -437,14 +327,6 @@ def WriteP5Ld : SchedWriteRes<[HWPort5,
//=== Integer Instructions ===//
//-- Move instructions --//
-// MOV.
-// r16,m.
-def : InstRW<[WriteALULd], (instregex "MOV16rm")>;
-
-// MOVSX, MOVZX.
-// r,m.
-def : InstRW<[WriteLoad], (instregex "MOV(S|Z)X32rm8")>;
-
// XLAT.
def WriteXLAT : SchedWriteRes<[]> {
let Latency = 7;
@@ -452,20 +334,12 @@ def WriteXLAT : SchedWriteRes<[]> {
}
def : InstRW<[WriteXLAT], (instregex "XLAT")>;
-// PUSH.
-// m.
-def : InstRW<[Write2P237_P4], (instregex "PUSH(16|32)rmm")>;
-
// PUSHA.
def WritePushA : SchedWriteRes<[]> {
let NumMicroOps = 19;
}
def : InstRW<[WritePushA], (instregex "PUSHA(16|32)")>;
-// POP.
-// m.
-def : InstRW<[Write2P237_P4], (instregex "POP(16|32)rmm")>;
-
// POPA.
def WritePopA : SchedWriteRes<[]> {
let NumMicroOps = 18;
@@ -541,7 +415,7 @@ def WriteMOVS : SchedWriteRes<[HWPort23,
let NumMicroOps = 5;
let ResourceCycles = [2, 1, 2];
}
-def : InstRW<[WriteMOVS], (instregex "MOVS(B|L|Q|W)")>;
+def : InstRW<[WriteMOVS], (instrs MOVSB, MOVSL, MOVSQ, MOVSW)>;
// CMPS.
def WriteCMPS : SchedWriteRes<[HWPort23, HWPort0156]> {
@@ -634,14 +508,14 @@ def WriteFPREM : SchedWriteRes<[]> {
let Latency = 19;
let NumMicroOps = 28;
}
-def : InstRW<[WriteFPREM], (instregex "FPREM")>;
+def : InstRW<[WriteFPREM], (instrs FPREM)>;
// FPREM1.
def WriteFPREM1 : SchedWriteRes<[]> {
let Latency = 27;
let NumMicroOps = 41;
}
-def : InstRW<[WriteFPREM1], (instregex "FPREM1")>;
+def : InstRW<[WriteFPREM1], (instrs FPREM1)>;
// FRNDINT.
def WriteFRNDINT : SchedWriteRes<[]> {
@@ -666,23 +540,6 @@ def WriteFXTRACT : SchedWriteRes<[]> {
}
def : InstRW<[WriteFXTRACT], (instregex "FXTRACT")>;
-//-- Other instructions --//
-
-// FNOP.
-def : InstRW<[WriteP01], (instregex "FNOP")>;
-
-// WAIT.
-def : InstRW<[Write2P01], (instregex "WAIT")>;
-
-// FNCLEX.
-def : InstRW<[Write5P0156], (instregex "FNCLEX")>;
-
-// FNINIT.
-def WriteFNINIT : SchedWriteRes<[]> {
- let NumMicroOps = 26;
-}
-def : InstRW<[WriteFNINIT], (instregex "FNINIT")>;
-
////////////////////////////////////////////////////////////////////////////////
// Horizontal add/sub instructions.
////////////////////////////////////////////////////////////////////////////////
@@ -790,7 +647,6 @@ def HWWriteResGroup0_2 : SchedWriteRes<[
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[HWWriteResGroup0_2], (instregex "MMX_MOVD64from64rm")>;
def: InstRW<[HWWriteResGroup0_2], (instregex "MMX_MOVD64rm")>;
def: InstRW<[HWWriteResGroup0_2], (instregex "MMX_MOVD64to64rm")>;
def: InstRW<[HWWriteResGroup0_2], (instregex "MMX_MOVQ64rm")>;
@@ -1380,7 +1236,6 @@ def HWWriteResGroup9 : SchedWriteRes<[HW
}
def: InstRW<[HWWriteResGroup9], (instregex "BLENDPDrri")>;
def: InstRW<[HWWriteResGroup9], (instregex "BLENDPSrri")>;
-def: InstRW<[HWWriteResGroup9], (instregex "MMX_MOVD64from64rr")>;
def: InstRW<[HWWriteResGroup9], (instregex "MMX_MOVQ64rr")>;
def: InstRW<[HWWriteResGroup9], (instregex "MMX_PANDNirr")>;
def: InstRW<[HWWriteResGroup9], (instregex "MMX_PANDirr")>;
@@ -1437,7 +1292,7 @@ def: InstRW<[HWWriteResGroup10], (instre
def: InstRW<[HWWriteResGroup10], (instregex "CMP8i8")>;
def: InstRW<[HWWriteResGroup10], (instregex "CMP8ri")>;
def: InstRW<[HWWriteResGroup10], (instregex "CMP8rr")>;
-def: InstRW<[HWWriteResGroup10], (instregex "CWDE")>;
+def: InstRW<[HWWriteResGroup10], (instrs CWDE)>;
def: InstRW<[HWWriteResGroup10], (instregex "DEC(16|32|64)r")>;
def: InstRW<[HWWriteResGroup10], (instregex "DEC8r")>;
def: InstRW<[HWWriteResGroup10], (instregex "INC(16|32|64)r")>;
@@ -2034,7 +1889,8 @@ def: InstRW<[HWWriteResGroup18], (instre
def: InstRW<[HWWriteResGroup18], (instregex "CMP8rm")>;
def: InstRW<[HWWriteResGroup18], (instregex "OR(16|32|64)rm")>;
def: InstRW<[HWWriteResGroup18], (instregex "OR8rm")>;
-def: InstRW<[HWWriteResGroup18], (instregex "POP(16|32|64)r(mr)?")>;
+def: InstRW<[HWWriteResGroup18], (instrs POP16r, POP32r, POP64r)>;
+def: InstRW<[HWWriteResGroup18], (instregex "POP(16|32|64)rmr")>;
def: InstRW<[HWWriteResGroup18], (instregex "SUB(16|32|64)rm")>;
def: InstRW<[HWWriteResGroup18], (instregex "SUB8rm")>;
def: InstRW<[HWWriteResGroup18], (instregex "TEST(16|32|64)mr")>;
@@ -2101,7 +1957,8 @@ def HWWriteResGroup24 : SchedWriteRes<[H
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
}
-def: InstRW<[HWWriteResGroup24], (instregex "PUSH(16|32|64)r(mr)?")>;
+def: InstRW<[HWWriteResGroup24], (instrs PUSH16r, PUSH32r, PUSH64r)>;
+def: InstRW<[HWWriteResGroup24], (instregex "PUSH(16|32|64)rmr")>;
def: InstRW<[HWWriteResGroup24], (instregex "PUSH64i8")>;
def: InstRW<[HWWriteResGroup24], (instregex "STOSB")>;
def: InstRW<[HWWriteResGroup24], (instregex "STOSL")>;
@@ -2294,7 +2151,7 @@ def: InstRW<[HWWriteResGroup35], (instre
def: InstRW<[HWWriteResGroup35], (instregex "ADC8ri")>;
def: InstRW<[HWWriteResGroup35], (instregex "ADC8rr")>;
def: InstRW<[HWWriteResGroup35], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rr")>;
-def: InstRW<[HWWriteResGroup35], (instregex "CWD")>;
+def: InstRW<[HWWriteResGroup35], (instrs CWD)>;
def: InstRW<[HWWriteResGroup35], (instregex "JRCXZ")>;
def: InstRW<[HWWriteResGroup35], (instregex "SBB(16|32|64)ri")>;
def: InstRW<[HWWriteResGroup35], (instregex "SBB(16|32|64)rr")>;
@@ -2930,13 +2787,8 @@ def HWWriteResGroup68 : SchedWriteRes<[H
}
def: InstRW<[HWWriteResGroup68], (instregex "ADC(16|32|64)mi")>;
def: InstRW<[HWWriteResGroup68], (instregex "ADC8mi")>;
-def: InstRW<[HWWriteResGroup68], (instregex "ADD8mi")>;
-def: InstRW<[HWWriteResGroup68], (instregex "AND8mi")>;
-def: InstRW<[HWWriteResGroup68], (instregex "OR8mi")>;
-def: InstRW<[HWWriteResGroup68], (instregex "SUB8mi")>;
def: InstRW<[HWWriteResGroup68], (instregex "XCHG(16|32|64)rm")>;
def: InstRW<[HWWriteResGroup68], (instregex "XCHG8rm")>;
-def: InstRW<[HWWriteResGroup68], (instregex "XOR8mi")>;
def HWWriteResGroup69 : SchedWriteRes<[HWPort4,HWPort23,HWPort237,HWPort06,HWPort0156]> {
let Latency = 9;
@@ -3626,7 +3478,7 @@ def HWWriteResGroup114 : SchedWriteRes<[
let NumMicroOps = 7;
let ResourceCycles = [2,2,1,2];
}
-def: InstRW<[HWWriteResGroup114], (instregex "LOOP")>;
+def: InstRW<[HWWriteResGroup114], (instrs LOOP)>;
def HWWriteResGroup115 : SchedWriteRes<[HWPort0,HWPort1,HWPort23]> {
let Latency = 15;
@@ -3778,8 +3630,8 @@ def HWWriteResGroup131 : SchedWriteRes<[
let NumMicroOps = 11;
let ResourceCycles = [2,9];
}
-def: InstRW<[HWWriteResGroup131], (instregex "LOOPE")>;
-def: InstRW<[HWWriteResGroup131], (instregex "LOOPNE")>;
+def: InstRW<[HWWriteResGroup131], (instrs LOOPE)>;
+def: InstRW<[HWWriteResGroup131], (instrs LOOPNE)>;
def HWWriteResGroup132 : SchedWriteRes<[HWPort4,HWPort23,HWPort237,HWPort06,HWPort15,HWPort0156]> {
let Latency = 17;
@@ -3932,7 +3784,7 @@ def HWWriteResGroup149 : SchedWriteRes<[
let ResourceCycles = [1,1,1,5];
}
def: InstRW<[HWWriteResGroup149], (instregex "CPUID")>;
-def: InstRW<[HWWriteResGroup149], (instregex "RDTSC")>;
+def: InstRW<[HWWriteResGroup149], (instrs RDTSC)>;
def HWWriteResGroup150 : SchedWriteRes<[HWPort0,HWPort5,HWPort23,HWPort0156]> {
let Latency = 24;
@@ -4072,7 +3924,7 @@ def HWWriteResGroup165 : SchedWriteRes<[
let NumMicroOps = 28;
let ResourceCycles = [1,6,1,1,19];
}
-def: InstRW<[HWWriteResGroup165], (instregex "XSAVE(OPT)?")>;
+def: InstRW<[HWWriteResGroup165], (instregex "^XSAVE$", "XSAVEC", "XSAVES", "XSAVEOPT")>;
def HWWriteResGroup166 : SchedWriteRes<[HWPort0,HWPort1,HWPort23]> {
let Latency = 34;
@@ -4153,7 +4005,7 @@ def HWWriteResGroup176 : SchedWriteRes<[
let NumMicroOps = 22;
let ResourceCycles = [2,20];
}
-def: InstRW<[HWWriteResGroup176], (instregex "RDTSCP")>;
+def: InstRW<[HWWriteResGroup176], (instrs RDTSCP)>;
def HWWriteResGroup177 : SchedWriteRes<[HWPort0,HWPort01,HWPort23,HWPort05,HWPort06,HWPort015,HWPort0156]> {
let Latency = 61;
@@ -4167,14 +4019,14 @@ def HWWriteResGroup178 : SchedWriteRes<[
let NumMicroOps = 88;
let ResourceCycles = [4,4,31,1,2,1,45];
}
-def: InstRW<[HWWriteResGroup178], (instregex "FXRSTOR64")>;
+def: InstRW<[HWWriteResGroup178], (instrs FXRSTOR64)>;
def HWWriteResGroup179 : SchedWriteRes<[HWPort0,HWPort6,HWPort23,HWPort05,HWPort06,HWPort15,HWPort0156]> {
let Latency = 64;
let NumMicroOps = 90;
let ResourceCycles = [4,2,33,1,2,1,47];
}
-def: InstRW<[HWWriteResGroup179], (instregex "FXRSTOR")>;
+def: InstRW<[HWWriteResGroup179], (instrs FXRSTOR)>;
def HWWriteResGroup180 : SchedWriteRes<[HWPort5,HWPort01,HWPort0156]> {
let Latency = 75;
Modified: llvm/trunk/lib/Target/X86/X86SchedSandyBridge.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedSandyBridge.td?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedSandyBridge.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedSandyBridge.td Sun Mar 18 01:38:06 2018
@@ -352,9 +352,9 @@ def: InstRW<[SBWriteResGroup2], (instreg
def: InstRW<[SBWriteResGroup2], (instregex "JMP_1")>;
def: InstRW<[SBWriteResGroup2], (instregex "JMP_4")>;
def: InstRW<[SBWriteResGroup2], (instregex "LD_Frr")>;
-def: InstRW<[SBWriteResGroup2], (instregex "LOOP")>;
-def: InstRW<[SBWriteResGroup2], (instregex "LOOPE")>;
-def: InstRW<[SBWriteResGroup2], (instregex "LOOPNE")>;
+def: InstRW<[SBWriteResGroup2], (instrs LOOP)>;
+def: InstRW<[SBWriteResGroup2], (instrs LOOPE)>;
+def: InstRW<[SBWriteResGroup2], (instrs LOOPNE)>;
def: InstRW<[SBWriteResGroup2], (instregex "MOV64toPQIrr")>;
def: InstRW<[SBWriteResGroup2], (instregex "MOVAPDrr")>;
def: InstRW<[SBWriteResGroup2], (instregex "MOVAPSrr")>;
@@ -399,7 +399,7 @@ def: InstRW<[SBWriteResGroup2], (instreg
def: InstRW<[SBWriteResGroup2], (instregex "VMOVDDUPrr")>;
def: InstRW<[SBWriteResGroup2], (instregex "VMOVDI2PDIrr")>;
def: InstRW<[SBWriteResGroup2], (instregex "VMOVHLPSrr")>;
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVHLPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVLHPSrr")>;
def: InstRW<[SBWriteResGroup2], (instregex "VMOVSDrr")>;
def: InstRW<[SBWriteResGroup2], (instregex "VMOVSHDUPYrr")>;
def: InstRW<[SBWriteResGroup2], (instregex "VMOVSHDUPrr")>;
@@ -673,7 +673,7 @@ def: InstRW<[SBWriteResGroup6], (instreg
def: InstRW<[SBWriteResGroup6], (instregex "CMP8i8")>;
def: InstRW<[SBWriteResGroup6], (instregex "CMP8ri")>;
def: InstRW<[SBWriteResGroup6], (instregex "CMP8rr")>;
-def: InstRW<[SBWriteResGroup6], (instregex "CWDE")>;
+def: InstRW<[SBWriteResGroup6], (instrs CWDE)>;
def: InstRW<[SBWriteResGroup6], (instregex "DEC(16|32|64)r")>;
def: InstRW<[SBWriteResGroup6], (instregex "DEC8r")>;
def: InstRW<[SBWriteResGroup6], (instregex "INC(16|32|64)r")>;
@@ -830,7 +830,7 @@ def SBWriteResGroup15 : SchedWriteRes<[S
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup15], (instregex "CWD")>;
+def: InstRW<[SBWriteResGroup15], (instrs CWD)>;
def: InstRW<[SBWriteResGroup15], (instregex "FNSTSW16r")>;
def SBWriteResGroup16 : SchedWriteRes<[SBPort1,SBPort05]> {
@@ -2137,7 +2137,7 @@ def SBWriteResGroup86 : SchedWriteRes<[S
let ResourceCycles = [1,2,2];
}
def: InstRW<[SBWriteResGroup86], (instregex "MOVSB")>;
-def: InstRW<[SBWriteResGroup86], (instregex "MOVSL")>;
+def: InstRW<[SBWriteResGroup86], (instrs MOVSL)>;
def: InstRW<[SBWriteResGroup86], (instregex "MOVSQ")>;
def: InstRW<[SBWriteResGroup86], (instregex "MOVSW")>;
def: InstRW<[SBWriteResGroup86], (instregex "XADD(16|32|64)rm")>;
Modified: llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td Sun Mar 18 01:38:06 2018
@@ -768,7 +768,6 @@ def: InstRW<[SKLWriteResGroup9], (instre
def: InstRW<[SKLWriteResGroup9], (instregex "ANDPSrr")>;
def: InstRW<[SKLWriteResGroup9], (instregex "BLENDPDrri")>;
def: InstRW<[SKLWriteResGroup9], (instregex "BLENDPSrri")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "MMX_MOVD64from64rr")>;
def: InstRW<[SKLWriteResGroup9], (instregex "MOVAPDrr")>;
def: InstRW<[SKLWriteResGroup9], (instregex "MOVAPSrr")>;
def: InstRW<[SKLWriteResGroup9], (instregex "MOVDQArr")>;
@@ -872,7 +871,7 @@ def: InstRW<[SKLWriteResGroup10], (instr
def: InstRW<[SKLWriteResGroup10], (instregex "CMP8i8")>;
def: InstRW<[SKLWriteResGroup10], (instregex "CMP8ri")>;
def: InstRW<[SKLWriteResGroup10], (instregex "CMP8rr")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "CWDE")>;
+def: InstRW<[SKLWriteResGroup10], (instrs CWDE)>;
def: InstRW<[SKLWriteResGroup10], (instregex "DEC(16|32|64)r")>;
def: InstRW<[SKLWriteResGroup10], (instregex "DEC8r")>;
def: InstRW<[SKLWriteResGroup10], (instregex "INC(16|32|64)r")>;
@@ -1150,7 +1149,7 @@ def SKLWriteResGroup23 : SchedWriteRes<[
}
def: InstRW<[SKLWriteResGroup23], (instregex "ADC8i8")>;
def: InstRW<[SKLWriteResGroup23], (instregex "ADC8ri")>;
-def: InstRW<[SKLWriteResGroup23], (instregex "CWD")>;
+def: InstRW<[SKLWriteResGroup23], (instrs CWD)>;
def: InstRW<[SKLWriteResGroup23], (instregex "JRCXZ")>;
def: InstRW<[SKLWriteResGroup23], (instregex "SBB8i8")>;
def: InstRW<[SKLWriteResGroup23], (instregex "SBB8ri")>;
@@ -1199,7 +1198,8 @@ def SKLWriteResGroup28 : SchedWriteRes<[
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
}
-def: InstRW<[SKLWriteResGroup28], (instregex "PUSH(16|32|64)r(mr)?")>;
+def: InstRW<[SKLWriteResGroup28], (instrs PUSH16r, PUSH32r, PUSH64r)>;
+def: InstRW<[SKLWriteResGroup28], (instregex "PUSH(16|32|64)rmr")>;
def: InstRW<[SKLWriteResGroup28], (instregex "PUSH64i8")>;
def: InstRW<[SKLWriteResGroup28], (instregex "STOSB")>;
def: InstRW<[SKLWriteResGroup28], (instregex "STOSL")>;
@@ -1685,7 +1685,6 @@ def SKLWriteResGroup58 : SchedWriteRes<[
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SKLWriteResGroup58], (instregex "MMX_MOVD64from64rm")>;
def: InstRW<[SKLWriteResGroup58], (instregex "MMX_MOVD64rm")>;
def: InstRW<[SKLWriteResGroup58], (instregex "MMX_MOVD64to64rm")>;
def: InstRW<[SKLWriteResGroup58], (instregex "MMX_MOVQ64rm")>;
@@ -2026,7 +2025,8 @@ def: InstRW<[SKLWriteResGroup76], (instr
def: InstRW<[SKLWriteResGroup76], (instregex "CMP8rm")>;
def: InstRW<[SKLWriteResGroup76], (instregex "OR(16|32|64)rm")>;
def: InstRW<[SKLWriteResGroup76], (instregex "OR8rm")>;
-def: InstRW<[SKLWriteResGroup76], (instregex "POP(16|32|64)r(mr)?")>;
+def: InstRW<[SKLWriteResGroup76], (instrs POP16r, POP32r, POP64r)>;
+def: InstRW<[SKLWriteResGroup76], (instregex "POP(16|32|64)rmr")>;
def: InstRW<[SKLWriteResGroup76], (instregex "SUB(16|32|64)rm")>;
def: InstRW<[SKLWriteResGroup76], (instregex "SUB8rm")>;
def: InstRW<[SKLWriteResGroup76], (instregex "TEST(16|32|64)mr")>;
@@ -2524,7 +2524,7 @@ def SKLWriteResGroup103 : SchedWriteRes<
let NumMicroOps = 7;
let ResourceCycles = [1,3,1,2];
}
-def: InstRW<[SKLWriteResGroup103], (instregex "LOOP")>;
+def: InstRW<[SKLWriteResGroup103], (instrs LOOP)>;
def SKLWriteResGroup104 : SchedWriteRes<[SKLPort0]> {
let Latency = 8;
@@ -2572,7 +2572,7 @@ def: InstRW<[SKLWriteResGroup107], (inst
def: InstRW<[SKLWriteResGroup107], (instrs IMUL32rm, IMUL32rmi, IMUL32rmi8, IMUL64rm, IMUL64rmi32, IMUL64rmi8)>;
def: InstRW<[SKLWriteResGroup107], (instrs IMUL8m)>;
def: InstRW<[SKLWriteResGroup107], (instregex "LZCNT(16|32|64)rm")>;
-def: InstRW<[SKLWriteResGroup107], (instregex "MUL(16|32|64)m")>;
+def: InstRW<[SKLWriteResGroup107], (instrs MUL64m)>;
def: InstRW<[SKLWriteResGroup107], (instregex "MUL8m")>;
def: InstRW<[SKLWriteResGroup107], (instregex "PDEP(32|64)rm")>;
def: InstRW<[SKLWriteResGroup107], (instregex "PEXT(32|64)rm")>;
@@ -3155,13 +3155,8 @@ def SKLWriteResGroup143 : SchedWriteRes<
let NumMicroOps = 8;
let ResourceCycles = [1,1,1,1,1,3];
}
-def: InstRW<[SKLWriteResGroup143], (instregex "ADD8mi")>;
-def: InstRW<[SKLWriteResGroup143], (instregex "AND8mi")>;
-def: InstRW<[SKLWriteResGroup143], (instregex "OR8mi")>;
-def: InstRW<[SKLWriteResGroup143], (instregex "SUB8mi")>;
def: InstRW<[SKLWriteResGroup143], (instregex "XCHG(16|32|64)rm")>;
def: InstRW<[SKLWriteResGroup143], (instregex "XCHG8rm")>;
-def: InstRW<[SKLWriteResGroup143], (instregex "XOR8mi")>;
def SKLWriteResGroup144 : SchedWriteRes<[SKLPort05,SKLPort0156]> {
let Latency = 10;
@@ -3310,8 +3305,8 @@ def SKLWriteResGroup156 : SchedWriteRes<
let NumMicroOps = 11;
let ResourceCycles = [2,9];
}
-def: InstRW<[SKLWriteResGroup156], (instregex "LOOPE")>;
-def: InstRW<[SKLWriteResGroup156], (instregex "LOOPNE")>;
+def: InstRW<[SKLWriteResGroup156], (instrs LOOPE)>;
+def: InstRW<[SKLWriteResGroup156], (instrs LOOPNE)>;
def SKLWriteResGroup157 : SchedWriteRes<[SKLPort0]> {
let Latency = 12;
@@ -3561,7 +3556,7 @@ def SKLWriteResGroup184 : SchedWriteRes<
let ResourceCycles = [1,1,1,5];
}
def: InstRW<[SKLWriteResGroup184], (instregex "CPUID")>;
-def: InstRW<[SKLWriteResGroup184], (instregex "RDTSC")>;
+def: InstRW<[SKLWriteResGroup184], (instrs RDTSC)>;
def SKLWriteResGroup185 : SchedWriteRes<[SKLPort1,SKLPort23,SKLPort237,SKLPort06,SKLPort15,SKLPort0156]> {
let Latency = 18;
@@ -3828,7 +3823,7 @@ def SKLWriteResGroup214 : SchedWriteRes<
let NumMicroOps = 22;
let ResourceCycles = [2,20];
}
-def: InstRW<[SKLWriteResGroup214], (instregex "RDTSCP")>;
+def: InstRW<[SKLWriteResGroup214], (instrs RDTSCP)>;
def SKLWriteResGroup215 : SchedWriteRes<[SKLPort4,SKLPort6,SKLPort23,SKLPort237,SKLPort0156]> {
let Latency = 42;
@@ -3856,14 +3851,14 @@ def SKLWriteResGroup218 : SchedWriteRes<
let NumMicroOps = 88;
let ResourceCycles = [4,4,31,1,2,1,45];
}
-def: InstRW<[SKLWriteResGroup218], (instregex "FXRSTOR64")>;
+def: InstRW<[SKLWriteResGroup218], (instrs FXRSTOR64)>;
def SKLWriteResGroup219 : SchedWriteRes<[SKLPort0,SKLPort6,SKLPort23,SKLPort05,SKLPort06,SKLPort15,SKLPort0156]> {
let Latency = 63;
let NumMicroOps = 90;
let ResourceCycles = [4,2,33,1,2,1,47];
}
-def: InstRW<[SKLWriteResGroup219], (instregex "FXRSTOR")>;
+def: InstRW<[SKLWriteResGroup219], (instrs FXRSTOR)>;
def SKLWriteResGroup220 : SchedWriteRes<[SKLPort5,SKLPort05,SKLPort0156]> {
let Latency = 75;
Modified: llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td Sun Mar 18 01:38:06 2018
@@ -1072,7 +1072,6 @@ def: InstRW<[SKXWriteResGroup9], (instre
def: InstRW<[SKXWriteResGroup9], (instregex "ANDPSrr")>;
def: InstRW<[SKXWriteResGroup9], (instregex "BLENDPDrri")>;
def: InstRW<[SKXWriteResGroup9], (instregex "BLENDPSrri")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "MMX_MOVD64from64rr")>;
def: InstRW<[SKXWriteResGroup9], (instregex "MOVAPDrr")>;
def: InstRW<[SKXWriteResGroup9], (instregex "MOVAPSrr")>;
def: InstRW<[SKXWriteResGroup9], (instregex "MOVDQArr")>;
@@ -1302,7 +1301,7 @@ def: InstRW<[SKXWriteResGroup10], (instr
def: InstRW<[SKXWriteResGroup10], (instregex "CMP8i8")>;
def: InstRW<[SKXWriteResGroup10], (instregex "CMP8ri")>;
def: InstRW<[SKXWriteResGroup10], (instregex "CMP8rr")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "CWDE")>;
+def: InstRW<[SKXWriteResGroup10], (instrs CWDE)>;
def: InstRW<[SKXWriteResGroup10], (instregex "DEC(16|32|64)r")>;
def: InstRW<[SKXWriteResGroup10], (instregex "DEC8r")>;
def: InstRW<[SKXWriteResGroup10], (instregex "INC(16|32|64)r")>;
@@ -1660,7 +1659,7 @@ def SKXWriteResGroup23 : SchedWriteRes<[
}
def: InstRW<[SKXWriteResGroup23], (instregex "ADC8i8")>;
def: InstRW<[SKXWriteResGroup23], (instregex "ADC8ri")>;
-def: InstRW<[SKXWriteResGroup23], (instregex "CWD")>;
+def: InstRW<[SKXWriteResGroup23], (instrs CWD)>;
def: InstRW<[SKXWriteResGroup23], (instregex "JRCXZ")>;
def: InstRW<[SKXWriteResGroup23], (instregex "SBB8i8")>;
def: InstRW<[SKXWriteResGroup23], (instregex "SBB8ri")>;
@@ -1714,7 +1713,8 @@ def SKXWriteResGroup28 : SchedWriteRes<[
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
}
-def: InstRW<[SKXWriteResGroup28], (instregex "PUSH(16|32|64)r(mr)?")>;
+def: InstRW<[SKXWriteResGroup28], (instrs PUSH16r, PUSH32r, PUSH64r)>;
+def: InstRW<[SKXWriteResGroup28], (instregex "PUSH(16|32|64)rmr")>;
def: InstRW<[SKXWriteResGroup28], (instregex "PUSH64i8")>;
def: InstRW<[SKXWriteResGroup28], (instregex "STOSB")>;
def: InstRW<[SKXWriteResGroup28], (instregex "STOSL")>;
@@ -2734,7 +2734,6 @@ def SKXWriteResGroup58 : SchedWriteRes<[
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SKXWriteResGroup58], (instregex "MMX_MOVD64from64rm")>;
def: InstRW<[SKXWriteResGroup58], (instregex "MMX_MOVD64rm")>;
def: InstRW<[SKXWriteResGroup58], (instregex "MMX_MOVD64to64rm")>;
def: InstRW<[SKXWriteResGroup58], (instregex "MMX_MOVQ64rm")>;
@@ -3215,7 +3214,8 @@ def: InstRW<[SKXWriteResGroup81], (instr
def: InstRW<[SKXWriteResGroup81], (instregex "CMP8rm")>;
def: InstRW<[SKXWriteResGroup81], (instregex "OR(16|32|64)rm")>;
def: InstRW<[SKXWriteResGroup81], (instregex "OR8rm")>;
-def: InstRW<[SKXWriteResGroup81], (instregex "POP(16|32|64)r(mr)?")>;
+def: InstRW<[SKXWriteResGroup81], (instrs POP16r, POP32r, POP64r)>;
+def: InstRW<[SKXWriteResGroup81], (instregex "POP(16|32|64)rmr")>;
def: InstRW<[SKXWriteResGroup81], (instregex "SUB(16|32|64)rm")>;
def: InstRW<[SKXWriteResGroup81], (instregex "SUB8rm")>;
def: InstRW<[SKXWriteResGroup81], (instregex "TEST(16|32|64)mr")>;
@@ -3945,7 +3945,7 @@ def SKXWriteResGroup111 : SchedWriteRes<
let NumMicroOps = 7;
let ResourceCycles = [1,3,1,2];
}
-def: InstRW<[SKXWriteResGroup111], (instregex "LOOP")>;
+def: InstRW<[SKXWriteResGroup111], (instrs LOOP)>;
def SKXWriteResGroup112 : SchedWriteRes<[SKXPort0,SKXPort4,SKXPort237,SKXPort0156]> {
let Latency = 7;
@@ -4031,7 +4031,7 @@ def: InstRW<[SKXWriteResGroup118], (inst
def: InstRW<[SKXWriteResGroup118], (instrs IMUL32rm, IMUL32rmi, IMUL32rmi8, IMUL64rm, IMUL64rmi32, IMUL64rmi8)>;
def: InstRW<[SKXWriteResGroup118], (instrs IMUL8m)>;
def: InstRW<[SKXWriteResGroup118], (instregex "LZCNT(16|32|64)rm")>;
-def: InstRW<[SKXWriteResGroup118], (instrs MUL16m, MUL32m, MUL64m)>;
+def: InstRW<[SKXWriteResGroup118], (instrs MUL64m)>;
def: InstRW<[SKXWriteResGroup118], (instrs MUL8m)>;
def: InstRW<[SKXWriteResGroup118], (instregex "PDEP(32|64)rm")>;
def: InstRW<[SKXWriteResGroup118], (instregex "PEXT(32|64)rm")>;
@@ -5233,13 +5233,8 @@ def SKXWriteResGroup157 : SchedWriteRes<
let NumMicroOps = 8;
let ResourceCycles = [1,1,1,1,1,3];
}
-def: InstRW<[SKXWriteResGroup157], (instregex "ADD8mi")>;
-def: InstRW<[SKXWriteResGroup157], (instregex "AND8mi")>;
-def: InstRW<[SKXWriteResGroup157], (instregex "OR8mi")>;
-def: InstRW<[SKXWriteResGroup157], (instregex "SUB8mi")>;
def: InstRW<[SKXWriteResGroup157], (instregex "XCHG(16|32|64)rm")>;
def: InstRW<[SKXWriteResGroup157], (instregex "XCHG8rm")>;
-def: InstRW<[SKXWriteResGroup157], (instregex "XOR8mi")>;
def SKXWriteResGroup158 : SchedWriteRes<[SKXPort05,SKXPort0156]> {
let Latency = 10;
@@ -5315,7 +5310,6 @@ def: InstRW<[SKXWriteResGroup161], (inst
def: InstRW<[SKXWriteResGroup161], (instregex "VCVTQQ2PDZ256rm(b?)(k?)(z?)")>;
def: InstRW<[SKXWriteResGroup161], (instregex "VCVTQQ2PDZrm(b?)(k?)(z?)")>;
def: InstRW<[SKXWriteResGroup161], (instregex "VCVTQQ2PSZ256rm(b?)(k?)(z?)")>;
-def: InstRW<[SKXWriteResGroup161], (instregex "VCVTQQ2PSZrm(b?)(k?)(z?)")>;
def: InstRW<[SKXWriteResGroup161], (instregex "VCVTTPD2QQZ256rm(b?)(k?)(z?)")>;
def: InstRW<[SKXWriteResGroup161], (instregex "VCVTTPD2QQZrm(b?)(k?)(z?)")>;
def: InstRW<[SKXWriteResGroup161], (instregex "VCVTTPD2UQQZ256rm(b?)(k?)(z?)")>;
@@ -5334,7 +5328,6 @@ def: InstRW<[SKXWriteResGroup161], (inst
def: InstRW<[SKXWriteResGroup161], (instregex "VCVTUQQ2PDZ256rm(b?)(k?)(z?)")>;
def: InstRW<[SKXWriteResGroup161], (instregex "VCVTUQQ2PDZrm(b?)(k?)(z?)")>;
def: InstRW<[SKXWriteResGroup161], (instregex "VCVTUQQ2PSZ256rm(b?)(k?)(z?)")>;
-def: InstRW<[SKXWriteResGroup161], (instregex "VCVTUQQ2PSZrm(b?)(k?)(z?)")>;
def: InstRW<[SKXWriteResGroup161], (instregex "VFIXUPIMMPDZ256rm(b?)i(k?)(z?)")>;
def: InstRW<[SKXWriteResGroup161], (instregex "VFIXUPIMMPDZrm(b?)i(k?)(z?)")>;
def: InstRW<[SKXWriteResGroup161], (instregex "VFIXUPIMMPSZ256rm(b?)i(k?)(z?)")>;
@@ -5530,8 +5523,8 @@ def SKXWriteResGroup171 : SchedWriteRes<
let NumMicroOps = 11;
let ResourceCycles = [2,9];
}
-def: InstRW<[SKXWriteResGroup171], (instregex "LOOPE")>;
-def: InstRW<[SKXWriteResGroup171], (instregex "LOOPNE")>;
+def: InstRW<[SKXWriteResGroup171], (instrs LOOPE)>;
+def: InstRW<[SKXWriteResGroup171], (instrs LOOPNE)>;
def SKXWriteResGroup172 : SchedWriteRes<[SKXPort0]> {
let Latency = 12;
@@ -5890,7 +5883,7 @@ def SKXWriteResGroup207 : SchedWriteRes<
let ResourceCycles = [1,1,1,5];
}
def: InstRW<[SKXWriteResGroup207], (instregex "CPUID")>;
-def: InstRW<[SKXWriteResGroup207], (instregex "RDTSC")>;
+def: InstRW<[SKXWriteResGroup207], (instrs RDTSC)>;
def SKXWriteResGroup208 : SchedWriteRes<[SKXPort1,SKXPort23,SKXPort237,SKXPort06,SKXPort15,SKXPort0156]> {
let Latency = 18;
@@ -6315,14 +6308,14 @@ def SKXWriteResGroup254 : SchedWriteRes<
let NumMicroOps = 22;
let ResourceCycles = [2,20];
}
-def: InstRW<[SKXWriteResGroup254], (instregex "RDTSCP")>;
+def: InstRW<[SKXWriteResGroup254], (instrs RDTSCP)>;
def SKXWriteResGroup255 : SchedWriteRes<[SKXPort4,SKXPort6,SKXPort23,SKXPort237,SKXPort0156]> {
let Latency = 42;
let NumMicroOps = 40;
let ResourceCycles = [1,11,1,1,26];
}
-def: InstRW<[SKXWriteResGroup255], (instregex "XSAVE")>;
+def: InstRW<[SKXWriteResGroup255], (instregex "^XSAVE$", "XSAVEC", "XSAVES", "XSAVEOPT")>;
def SKXWriteResGroup256 : SchedWriteRes<[SKXPort5,SKXPort01,SKXPort23,SKXPort015]> {
let Latency = 44;
@@ -6344,14 +6337,14 @@ def SKXWriteResGroup259 : SchedWriteRes<
let NumMicroOps = 88;
let ResourceCycles = [4,4,31,1,2,1,45];
}
-def: InstRW<[SKXWriteResGroup259], (instregex "FXRSTOR64")>;
+def: InstRW<[SKXWriteResGroup259], (instrs FXRSTOR64)>;
def SKXWriteResGroup260 : SchedWriteRes<[SKXPort0,SKXPort6,SKXPort23,SKXPort05,SKXPort06,SKXPort15,SKXPort0156]> {
let Latency = 63;
let NumMicroOps = 90;
let ResourceCycles = [4,2,33,1,2,1,47];
}
-def: InstRW<[SKXWriteResGroup260], (instregex "FXRSTOR")>;
+def: InstRW<[SKXWriteResGroup260], (instrs FXRSTOR)>;
def SKXWriteResGroup261 : SchedWriteRes<[SKXPort5,SKXPort01,SKXPort015]> {
let Latency = 67;
Modified: llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td Sun Mar 18 01:38:06 2018
@@ -704,18 +704,6 @@ def JWriteFPAY22Ld: SchedWriteRes<[JLAGU
}
def : InstRW<[JWriteFPAY22Ld, ReadAfterLd], (instregex "VCMPP(S|D)Yrmi", "VM(AX|IN)P(D|S)Yrm")>;
-def JWriteVHAddSubY: SchedWriteRes<[JFPU0]> {
- let Latency = 3;
- let ResourceCycles = [2];
-}
-def : InstRW<[JWriteVHAddSubY], (instrs VHADDPDYrr, VHADDPSYrr, VHSUBPDYrr, VHSUBPSYrr)>;
-
-def JWriteVHAddSubYLd: SchedWriteRes<[JLAGU, JFPU0]> {
- let Latency = 8;
- let ResourceCycles = [1, 2];
-}
-def : InstRW<[JWriteVHAddSubYLd], (instrs VHADDPDYrm, VHADDPSYrm, VHSUBPDYrm, VHSUBPSYrm)>;
-
def JWriteVMaskMovLd: SchedWriteRes<[JLAGU,JFPU01]> {
let Latency = 6;
let ResourceCycles = [1, 2];
Modified: llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td Sun Mar 18 01:38:06 2018
@@ -476,12 +476,11 @@ def : InstRW<[WriteMicrocoded], (instreg
// LOOP.
def ZnWriteLOOP : SchedWriteRes<[ZnALU03]>;
-def : InstRW<[ZnWriteLOOP], (instregex "LOOP")>;
+def : InstRW<[ZnWriteLOOP], (instrs LOOP)>;
// LOOP(N)E, LOOP(N)Z
def ZnWriteLOOPE : SchedWriteRes<[ZnALU03]>;
-def : InstRW<[ZnWriteLOOPE], (instregex "LOOPE", "LOOPNE",
- "LOOPZ", "LOOPNZ")>;
+def : InstRW<[ZnWriteLOOPE], (instrs LOOPE, LOOPNE)>;
// CALL.
// r.
@@ -854,10 +853,10 @@ def : InstRW<[ZnWriteFPU0Lat1], (instreg
def : InstRW<[ZnWriteFPU3Lat1], (instregex "FXAM")>;
// FPREM.
-def : InstRW<[WriteMicrocoded], (instregex "FPREM")>;
+def : InstRW<[WriteMicrocoded], (instrs FPREM)>;
// FPREM1.
-def : InstRW<[WriteMicrocoded], (instregex "FPREM1")>;
+def : InstRW<[WriteMicrocoded], (instrs FPREM1)>;
// FRNDINT.
def : InstRW<[WriteMicrocoded], (instregex "FRNDINT")>;
Modified: llvm/trunk/test/CodeGen/X86/avx-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-schedule.ll?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx-schedule.ll Sun Mar 18 01:38:06 2018
@@ -4261,7 +4261,7 @@ define <8 x float> @test_rsqrtps(<8 x fl
; ZNVER1-LABEL: test_rsqrtps:
; ZNVER1: # %bb.0:
; ZNVER1-NEXT: vrsqrtps (%rdi), %ymm1 # sched: [12:0.50]
-; ZNVER1-NEXT: vrsqrtps %ymm0, %ymm0 # sched: [5:0.50]
+; ZNVER1-NEXT: vrsqrtps %ymm0, %ymm0 # sched: [5:1.00]
; ZNVER1-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
; ZNVER1-NEXT: retq # sched: [1:0.50]
%1 = call <8 x float> @llvm.x86.avx.rsqrt.ps.256(<8 x float> %a0)
Modified: llvm/trunk/test/CodeGen/X86/mmx-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-schedule.ll?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-schedule.ll Sun Mar 18 01:38:06 2018
@@ -65,7 +65,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; SKYLAKE-NEXT: cvtpd2pi %xmm0, %mm0 # sched: [5:1.00]
; SKYLAKE-NEXT: cvtpd2pi (%rdi), %mm1 # sched: [11:1.00]
; SKYLAKE-NEXT: por %mm0, %mm1 # sched: [1:0.50]
-; SKYLAKE-NEXT: movq %mm1, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm1, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_cvtpd2pi:
@@ -73,7 +73,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; SKX-NEXT: cvtpd2pi %xmm0, %mm0 # sched: [5:1.00]
; SKX-NEXT: cvtpd2pi (%rdi), %mm1 # sched: [11:1.00]
; SKX-NEXT: por %mm0, %mm1 # sched: [1:0.50]
-; SKX-NEXT: movq %mm1, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm1, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cvtpd2pi:
@@ -310,7 +310,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; SKYLAKE-NEXT: cvtps2pi %xmm0, %mm0 # sched: [5:1.00]
; SKYLAKE-NEXT: cvtps2pi (%rdi), %mm1 # sched: [9:0.50]
; SKYLAKE-NEXT: por %mm0, %mm1 # sched: [1:0.50]
-; SKYLAKE-NEXT: movq %mm1, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm1, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_cvtps2pi:
@@ -318,7 +318,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; SKX-NEXT: cvtps2pi %xmm0, %mm0 # sched: [5:1.00]
; SKX-NEXT: cvtps2pi (%rdi), %mm1 # sched: [9:0.50]
; SKX-NEXT: por %mm0, %mm1 # sched: [1:0.50]
-; SKX-NEXT: movq %mm1, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm1, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cvtps2pi:
@@ -399,7 +399,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; SKYLAKE-NEXT: cvttpd2pi %xmm0, %mm0 # sched: [5:1.00]
; SKYLAKE-NEXT: cvttpd2pi (%rdi), %mm1 # sched: [11:1.00]
; SKYLAKE-NEXT: por %mm0, %mm1 # sched: [1:0.50]
-; SKYLAKE-NEXT: movq %mm1, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm1, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_cvttpd2pi:
@@ -407,7 +407,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; SKX-NEXT: cvttpd2pi %xmm0, %mm0 # sched: [5:1.00]
; SKX-NEXT: cvttpd2pi (%rdi), %mm1 # sched: [11:1.00]
; SKX-NEXT: por %mm0, %mm1 # sched: [1:0.50]
-; SKX-NEXT: movq %mm1, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm1, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cvttpd2pi:
@@ -488,7 +488,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; SKYLAKE-NEXT: cvttps2pi %xmm0, %mm0 # sched: [5:1.00]
; SKYLAKE-NEXT: cvttps2pi (%rdi), %mm1 # sched: [9:0.50]
; SKYLAKE-NEXT: por %mm0, %mm1 # sched: [1:0.50]
-; SKYLAKE-NEXT: movq %mm1, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm1, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_cvttps2pi:
@@ -496,7 +496,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; SKX-NEXT: cvttps2pi %xmm0, %mm0 # sched: [5:1.00]
; SKX-NEXT: cvttps2pi (%rdi), %mm1 # sched: [9:0.50]
; SKX-NEXT: por %mm0, %mm1 # sched: [1:0.50]
-; SKX-NEXT: movq %mm1, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm1, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cvttps2pi:
@@ -805,14 +805,14 @@ define i64 @test_movdq2q(<2 x i64> %a0)
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movdq2q %xmm0, %mm0 # sched: [2:1.00]
; SKYLAKE-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_movdq2q:
; SKX: # %bb.0:
; SKX-NEXT: movdq2q %xmm0, %mm0 # sched: [2:1.00]
; SKX-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_movdq2q:
@@ -1072,14 +1072,14 @@ define i64 @test_pabsb(x86_mmx *%a0) opt
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pabsb (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pabsb:
; SKX: # %bb.0:
; SKX-NEXT: pabsb (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pabsb:
@@ -1150,14 +1150,14 @@ define i64 @test_pabsd(x86_mmx *%a0) opt
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pabsd (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pabsd:
; SKX: # %bb.0:
; SKX-NEXT: pabsd (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pabsd:
@@ -1228,14 +1228,14 @@ define i64 @test_pabsw(x86_mmx *%a0) opt
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pabsw (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pabsw:
; SKX: # %bb.0:
; SKX-NEXT: pabsw (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pabsw:
@@ -1306,14 +1306,14 @@ define i64 @test_packssdw(x86_mmx %a0, x
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: packssdw %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: packssdw (%rdi), %mm0 # sched: [7:2.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_packssdw:
; SKX: # %bb.0:
; SKX-NEXT: packssdw %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: packssdw (%rdi), %mm0 # sched: [7:2.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_packssdw:
@@ -1384,14 +1384,14 @@ define i64 @test_packsswb(x86_mmx %a0, x
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: packsswb %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: packsswb (%rdi), %mm0 # sched: [7:2.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_packsswb:
; SKX: # %bb.0:
; SKX-NEXT: packsswb %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: packsswb (%rdi), %mm0 # sched: [7:2.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_packsswb:
@@ -1462,14 +1462,14 @@ define i64 @test_packuswb(x86_mmx %a0, x
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: packuswb %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: packuswb (%rdi), %mm0 # sched: [7:2.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_packuswb:
; SKX: # %bb.0:
; SKX-NEXT: packuswb %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: packuswb (%rdi), %mm0 # sched: [7:2.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_packuswb:
@@ -1540,14 +1540,14 @@ define i64 @test_paddb(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddb %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: paddb (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddb:
; SKX: # %bb.0:
; SKX-NEXT: paddb %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: paddb (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddb:
@@ -1618,14 +1618,14 @@ define i64 @test_paddd(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddd %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: paddd (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddd:
; SKX: # %bb.0:
; SKX-NEXT: paddd %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: paddd (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddd:
@@ -1696,14 +1696,14 @@ define i64 @test_paddq(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddq %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: paddq (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddq:
; SKX: # %bb.0:
; SKX-NEXT: paddq %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: paddq (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddq:
@@ -1774,14 +1774,14 @@ define i64 @test_paddsb(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddsb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: paddsb (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddsb:
; SKX: # %bb.0:
; SKX-NEXT: paddsb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: paddsb (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddsb:
@@ -1852,14 +1852,14 @@ define i64 @test_paddsw(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddsw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: paddsw (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddsw:
; SKX: # %bb.0:
; SKX-NEXT: paddsw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: paddsw (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddsw:
@@ -1930,14 +1930,14 @@ define i64 @test_paddusb(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddusb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: paddusb (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddusb:
; SKX: # %bb.0:
; SKX-NEXT: paddusb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: paddusb (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddusb:
@@ -2008,14 +2008,14 @@ define i64 @test_paddusw(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddusw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: paddusw (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddusw:
; SKX: # %bb.0:
; SKX-NEXT: paddusw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: paddusw (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddusw:
@@ -2086,14 +2086,14 @@ define i64 @test_paddw(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddw %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: paddw (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddw:
; SKX: # %bb.0:
; SKX-NEXT: paddw %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: paddw (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddw:
@@ -2164,14 +2164,14 @@ define i64 @test_palignr(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: palignr $1, %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: palignr $1, (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_palignr:
; SKX: # %bb.0:
; SKX-NEXT: palignr $1, %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: palignr $1, (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_palignr:
@@ -2242,14 +2242,14 @@ define i64 @test_pand(x86_mmx %a0, x86_m
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pand %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: pand (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pand:
; SKX: # %bb.0:
; SKX-NEXT: pand %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: pand (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pand:
@@ -2320,14 +2320,14 @@ define i64 @test_pandn(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pandn %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: pandn (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pandn:
; SKX: # %bb.0:
; SKX-NEXT: pandn %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: pandn (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pandn:
@@ -2398,14 +2398,14 @@ define i64 @test_pavgb(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pavgb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pavgb (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pavgb:
; SKX: # %bb.0:
; SKX-NEXT: pavgb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pavgb (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pavgb:
@@ -2476,14 +2476,14 @@ define i64 @test_pavgw(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pavgw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pavgw (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pavgw:
; SKX: # %bb.0:
; SKX-NEXT: pavgw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pavgw (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pavgw:
@@ -2554,14 +2554,14 @@ define i64 @test_pcmpeqb(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpeqb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpeqb (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpeqb:
; SKX: # %bb.0:
; SKX-NEXT: pcmpeqb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpeqb (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpeqb:
@@ -2632,14 +2632,14 @@ define i64 @test_pcmpeqd(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpeqd %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpeqd (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpeqd:
; SKX: # %bb.0:
; SKX-NEXT: pcmpeqd %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpeqd (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpeqd:
@@ -2710,14 +2710,14 @@ define i64 @test_pcmpeqw(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpeqw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpeqw (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpeqw:
; SKX: # %bb.0:
; SKX-NEXT: pcmpeqw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpeqw (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpeqw:
@@ -2788,14 +2788,14 @@ define i64 @test_pcmpgtb(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpgtb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpgtb (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpgtb:
; SKX: # %bb.0:
; SKX-NEXT: pcmpgtb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpgtb (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpgtb:
@@ -2866,14 +2866,14 @@ define i64 @test_pcmpgtd(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpgtd %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpgtd (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpgtd:
; SKX: # %bb.0:
; SKX-NEXT: pcmpgtd %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpgtd (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpgtd:
@@ -2944,14 +2944,14 @@ define i64 @test_pcmpgtw(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpgtw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpgtw (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpgtw:
; SKX: # %bb.0:
; SKX-NEXT: pcmpgtw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpgtw (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpgtw:
@@ -3077,14 +3077,14 @@ define i64 @test_phaddd(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phaddd %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phaddd (%rdi), %mm0 # sched: [8:2.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phaddd:
; SKX: # %bb.0:
; SKX-NEXT: phaddd %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phaddd (%rdi), %mm0 # sched: [8:2.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phaddd:
@@ -3155,14 +3155,14 @@ define i64 @test_phaddsw(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phaddsw %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phaddsw (%rdi), %mm0 # sched: [8:2.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phaddsw:
; SKX: # %bb.0:
; SKX-NEXT: phaddsw %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phaddsw (%rdi), %mm0 # sched: [8:2.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phaddsw:
@@ -3233,14 +3233,14 @@ define i64 @test_phaddw(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phaddw %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phaddw (%rdi), %mm0 # sched: [8:2.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phaddw:
; SKX: # %bb.0:
; SKX-NEXT: phaddw %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phaddw (%rdi), %mm0 # sched: [8:2.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phaddw:
@@ -3311,14 +3311,14 @@ define i64 @test_phsubd(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phsubd %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phsubd (%rdi), %mm0 # sched: [8:2.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phsubd:
; SKX: # %bb.0:
; SKX-NEXT: phsubd %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phsubd (%rdi), %mm0 # sched: [8:2.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phsubd:
@@ -3389,14 +3389,14 @@ define i64 @test_phsubsw(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phsubsw %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phsubsw (%rdi), %mm0 # sched: [8:2.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phsubsw:
; SKX: # %bb.0:
; SKX-NEXT: phsubsw %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phsubsw (%rdi), %mm0 # sched: [8:2.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phsubsw:
@@ -3467,14 +3467,14 @@ define i64 @test_phsubw(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phsubw %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phsubw (%rdi), %mm0 # sched: [8:2.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phsubw:
; SKX: # %bb.0:
; SKX-NEXT: phsubw %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phsubw (%rdi), %mm0 # sched: [8:2.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phsubw:
@@ -3552,7 +3552,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; SKYLAKE-NEXT: pinsrw $0, %edi, %mm0 # sched: [2:2.00]
; SKYLAKE-NEXT: movswl (%rsi), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: pinsrw $1, %eax, %mm0 # sched: [2:2.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pinsrw:
@@ -3560,7 +3560,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; SKX-NEXT: pinsrw $0, %edi, %mm0 # sched: [2:2.00]
; SKX-NEXT: movswl (%rsi), %eax # sched: [5:0.50]
; SKX-NEXT: pinsrw $1, %eax, %mm0 # sched: [2:2.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pinsrw:
@@ -3634,14 +3634,14 @@ define i64 @test_pmaddwd(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmaddwd %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmaddwd (%rdi), %mm0 # sched: [9:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmaddwd:
; SKX: # %bb.0:
; SKX-NEXT: pmaddwd %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmaddwd (%rdi), %mm0 # sched: [9:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmaddwd:
@@ -3712,14 +3712,14 @@ define i64 @test_pmaddubsw(x86_mmx %a0,
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmaddubsw %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmaddubsw (%rdi), %mm0 # sched: [9:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmaddubsw:
; SKX: # %bb.0:
; SKX-NEXT: pmaddubsw %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmaddubsw (%rdi), %mm0 # sched: [9:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmaddubsw:
@@ -3790,14 +3790,14 @@ define i64 @test_pmaxsw(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmaxsw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pmaxsw (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmaxsw:
; SKX: # %bb.0:
; SKX-NEXT: pmaxsw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pmaxsw (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmaxsw:
@@ -3868,14 +3868,14 @@ define i64 @test_pmaxub(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmaxub %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pmaxub (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmaxub:
; SKX: # %bb.0:
; SKX-NEXT: pmaxub %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pmaxub (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmaxub:
@@ -3946,14 +3946,14 @@ define i64 @test_pminsw(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pminsw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pminsw (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pminsw:
; SKX: # %bb.0:
; SKX-NEXT: pminsw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pminsw (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pminsw:
@@ -4024,14 +4024,14 @@ define i64 @test_pminub(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pminub %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pminub (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pminub:
; SKX: # %bb.0:
; SKX-NEXT: pminub %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pminub (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pminub:
@@ -4157,14 +4157,14 @@ define i64 @test_pmulhrsw(x86_mmx %a0, x
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmulhrsw %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmulhrsw (%rdi), %mm0 # sched: [9:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmulhrsw:
; SKX: # %bb.0:
; SKX-NEXT: pmulhrsw %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmulhrsw (%rdi), %mm0 # sched: [9:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmulhrsw:
@@ -4235,14 +4235,14 @@ define i64 @test_pmulhw(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmulhw %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmulhw (%rdi), %mm0 # sched: [9:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmulhw:
; SKX: # %bb.0:
; SKX-NEXT: pmulhw %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmulhw (%rdi), %mm0 # sched: [9:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmulhw:
@@ -4313,14 +4313,14 @@ define i64 @test_pmulhuw(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmulhuw %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmulhuw (%rdi), %mm0 # sched: [9:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmulhuw:
; SKX: # %bb.0:
; SKX-NEXT: pmulhuw %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmulhuw (%rdi), %mm0 # sched: [9:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmulhuw:
@@ -4391,14 +4391,14 @@ define i64 @test_pmullw(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmullw %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmullw (%rdi), %mm0 # sched: [9:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmullw:
; SKX: # %bb.0:
; SKX-NEXT: pmullw %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmullw (%rdi), %mm0 # sched: [9:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmullw:
@@ -4469,14 +4469,14 @@ define i64 @test_pmuludq(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmuludq %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmuludq (%rdi), %mm0 # sched: [9:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmuludq:
; SKX: # %bb.0:
; SKX-NEXT: pmuludq %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmuludq (%rdi), %mm0 # sched: [9:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmuludq:
@@ -4547,14 +4547,14 @@ define i64 @test_por(x86_mmx %a0, x86_mm
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: por %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: por (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_por:
; SKX: # %bb.0:
; SKX-NEXT: por %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: por (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_por:
@@ -4625,14 +4625,14 @@ define i64 @test_psadbw(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psadbw %mm1, %mm0 # sched: [3:1.00]
; SKYLAKE-NEXT: psadbw (%rdi), %mm0 # sched: [8:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psadbw:
; SKX: # %bb.0:
; SKX-NEXT: psadbw %mm1, %mm0 # sched: [3:1.00]
; SKX-NEXT: psadbw (%rdi), %mm0 # sched: [8:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psadbw:
@@ -4703,14 +4703,14 @@ define i64 @test_pshufb(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pshufb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pshufb (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pshufb:
; SKX: # %bb.0:
; SKX-NEXT: pshufb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pshufb (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pshufb:
@@ -4781,14 +4781,14 @@ define i64 @test_pshufw(x86_mmx *%a0) op
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [6:1.00]
; SKYLAKE-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pshufw:
; SKX: # %bb.0:
; SKX-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [6:1.00]
; SKX-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pshufw:
@@ -4859,14 +4859,14 @@ define i64 @test_psignb(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psignb %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psignb (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psignb:
; SKX: # %bb.0:
; SKX-NEXT: psignb %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psignb (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psignb:
@@ -4937,14 +4937,14 @@ define i64 @test_psignd(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psignd %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psignd (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psignd:
; SKX: # %bb.0:
; SKX-NEXT: psignd %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psignd (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psignd:
@@ -5015,14 +5015,14 @@ define i64 @test_psignw(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psignw %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psignw (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psignw:
; SKX: # %bb.0:
; SKX-NEXT: psignw %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psignw (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psignw:
@@ -5100,7 +5100,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; SKYLAKE-NEXT: pslld %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pslld (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: pslld $7, %mm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pslld:
@@ -5108,7 +5108,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; SKX-NEXT: pslld %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pslld (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: pslld $7, %mm0 # sched: [1:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pslld:
@@ -5190,7 +5190,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; SKYLAKE-NEXT: psllq %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psllq (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psllq $7, %mm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psllq:
@@ -5198,7 +5198,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; SKX-NEXT: psllq %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psllq (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psllq $7, %mm0 # sched: [1:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psllq:
@@ -5280,7 +5280,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; SKYLAKE-NEXT: psllw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psllw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psllw $7, %mm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psllw:
@@ -5288,7 +5288,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; SKX-NEXT: psllw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psllw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psllw $7, %mm0 # sched: [1:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psllw:
@@ -5370,7 +5370,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; SKYLAKE-NEXT: psrad %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psrad (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psrad $7, %mm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psrad:
@@ -5378,7 +5378,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; SKX-NEXT: psrad %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psrad (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psrad $7, %mm0 # sched: [1:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psrad:
@@ -5460,7 +5460,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; SKYLAKE-NEXT: psraw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psraw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psraw $7, %mm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psraw:
@@ -5468,7 +5468,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; SKX-NEXT: psraw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psraw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psraw $7, %mm0 # sched: [1:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psraw:
@@ -5550,7 +5550,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; SKYLAKE-NEXT: psrld %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psrld (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psrld $7, %mm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psrld:
@@ -5558,7 +5558,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; SKX-NEXT: psrld %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psrld (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psrld $7, %mm0 # sched: [1:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psrld:
@@ -5640,7 +5640,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; SKYLAKE-NEXT: psrlq %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psrlq (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psrlq $7, %mm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psrlq:
@@ -5648,7 +5648,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; SKX-NEXT: psrlq %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psrlq (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psrlq $7, %mm0 # sched: [1:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psrlq:
@@ -5730,7 +5730,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; SKYLAKE-NEXT: psrlw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psrlw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psrlw $7, %mm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psrlw:
@@ -5738,7 +5738,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; SKX-NEXT: psrlw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psrlw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psrlw $7, %mm0 # sched: [1:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psrlw:
@@ -5813,14 +5813,14 @@ define i64 @test_psubb(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubb %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psubb (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubb:
; SKX: # %bb.0:
; SKX-NEXT: psubb %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psubb (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubb:
@@ -5891,14 +5891,14 @@ define i64 @test_psubd(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubd %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psubd (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubd:
; SKX: # %bb.0:
; SKX-NEXT: psubd %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psubd (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubd:
@@ -5969,14 +5969,14 @@ define i64 @test_psubq(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubq %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psubq (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubq:
; SKX: # %bb.0:
; SKX-NEXT: psubq %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psubq (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubq:
@@ -6047,14 +6047,14 @@ define i64 @test_psubsb(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubsb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psubsb (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubsb:
; SKX: # %bb.0:
; SKX-NEXT: psubsb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psubsb (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubsb:
@@ -6125,14 +6125,14 @@ define i64 @test_psubsw(x86_mmx %a0, x86
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubsw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psubsw (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubsw:
; SKX: # %bb.0:
; SKX-NEXT: psubsw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psubsw (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubsw:
@@ -6203,14 +6203,14 @@ define i64 @test_psubusb(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubusb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psubusb (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubusb:
; SKX: # %bb.0:
; SKX-NEXT: psubusb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psubusb (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubusb:
@@ -6281,14 +6281,14 @@ define i64 @test_psubusw(x86_mmx %a0, x8
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubusw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psubusw (%rdi), %mm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubusw:
; SKX: # %bb.0:
; SKX-NEXT: psubusw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psubusw (%rdi), %mm0 # sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubusw:
@@ -6359,14 +6359,14 @@ define i64 @test_psubw(x86_mmx %a0, x86_
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubw %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psubw (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubw:
; SKX: # %bb.0:
; SKX-NEXT: psubw %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psubw (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubw:
@@ -6437,14 +6437,14 @@ define i64 @test_punpckhbw(x86_mmx %a0,
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:1.00]
; SKYLAKE-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpckhbw:
; SKX: # %bb.0:
; SKX-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:1.00]
; SKX-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpckhbw:
@@ -6515,14 +6515,14 @@ define i64 @test_punpckhdq(x86_mmx %a0,
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:1.00]
; SKYLAKE-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpckhdq:
; SKX: # %bb.0:
; SKX-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:1.00]
; SKX-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpckhdq:
@@ -6593,14 +6593,14 @@ define i64 @test_punpckhwd(x86_mmx %a0,
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SKYLAKE-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpckhwd:
; SKX: # %bb.0:
; SKX-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SKX-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpckhwd:
@@ -6671,14 +6671,14 @@ define i64 @test_punpcklbw(x86_mmx %a0,
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SKYLAKE-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpcklbw:
; SKX: # %bb.0:
; SKX-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SKX-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpcklbw:
@@ -6749,14 +6749,14 @@ define i64 @test_punpckldq(x86_mmx %a0,
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00]
; SKYLAKE-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpckldq:
; SKX: # %bb.0:
; SKX-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00]
; SKX-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpckldq:
@@ -6827,14 +6827,14 @@ define i64 @test_punpcklwd(x86_mmx %a0,
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00]
; SKYLAKE-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [6:1.00]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpcklwd:
; SKX: # %bb.0:
; SKX-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00]
; SKX-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [6:1.00]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpcklwd:
@@ -6905,14 +6905,14 @@ define i64 @test_pxor(x86_mmx %a0, x86_m
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pxor %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: pxor (%rdi), %mm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKYLAKE-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pxor:
; SKX: # %bb.0:
; SKX-NEXT: pxor %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: pxor (%rdi), %mm0 # sched: [6:0.50]
-; SKX-NEXT: movq %mm0, %rax # sched: [1:0.33]
+; SKX-NEXT: movq %mm0, %rax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pxor:
Modified: llvm/trunk/test/CodeGen/X86/schedule-x86_32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/schedule-x86_32.ll?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/schedule-x86_32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/schedule-x86_32.ll Sun Mar 18 01:38:06 2018
@@ -1668,9 +1668,9 @@ define i16 @test_pop_push_16(i16 %a0, i1
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; HASWELL-NEXT: #APP
; HASWELL-NEXT: popw %ax # sched: [6:0.50]
-; HASWELL-NEXT: popw (%ecx) # sched: [1:1.00]
+; HASWELL-NEXT: popw (%ecx) # sched: [7:1.00]
; HASWELL-NEXT: pushw %ax # sched: [2:1.00]
-; HASWELL-NEXT: pushw (%ecx) # sched: [1:1.00]
+; HASWELL-NEXT: pushw (%ecx) # sched: [7:1.00]
; HASWELL-NEXT: pushw $4095 # imm = 0xFFF
; HASWELL-NEXT: # sched: [1:1.00]
; HASWELL-NEXT: pushw $7 # sched: [1:1.00]
@@ -1683,9 +1683,9 @@ define i16 @test_pop_push_16(i16 %a0, i1
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: popw %ax # sched: [6:0.50]
-; BROADWELL-NEXT: popw (%ecx) # sched: [6:0.50]
+; BROADWELL-NEXT: popw (%ecx) # sched: [6:1.00]
; BROADWELL-NEXT: pushw %ax # sched: [2:1.00]
-; BROADWELL-NEXT: pushw (%ecx) # sched: [2:1.00]
+; BROADWELL-NEXT: pushw (%ecx) # sched: [6:1.00]
; BROADWELL-NEXT: pushw $4095 # imm = 0xFFF
; BROADWELL-NEXT: # sched: [1:1.00]
; BROADWELL-NEXT: pushw $7 # sched: [1:1.00]
@@ -1698,9 +1698,9 @@ define i16 @test_pop_push_16(i16 %a0, i1
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: popw %ax # sched: [6:0.50]
-; SKYLAKE-NEXT: popw (%ecx) # sched: [6:0.50]
+; SKYLAKE-NEXT: popw (%ecx) # sched: [6:1.00]
; SKYLAKE-NEXT: pushw %ax # sched: [2:1.00]
-; SKYLAKE-NEXT: pushw (%ecx) # sched: [2:1.00]
+; SKYLAKE-NEXT: pushw (%ecx) # sched: [6:1.00]
; SKYLAKE-NEXT: pushw $4095 # imm = 0xFFF
; SKYLAKE-NEXT: # sched: [1:1.00]
; SKYLAKE-NEXT: pushw $7 # sched: [1:1.00]
@@ -1713,9 +1713,9 @@ define i16 @test_pop_push_16(i16 %a0, i1
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
; SKX-NEXT: popw %ax # sched: [6:0.50]
-; SKX-NEXT: popw (%ecx) # sched: [6:0.50]
+; SKX-NEXT: popw (%ecx) # sched: [6:1.00]
; SKX-NEXT: pushw %ax # sched: [2:1.00]
-; SKX-NEXT: pushw (%ecx) # sched: [2:1.00]
+; SKX-NEXT: pushw (%ecx) # sched: [6:1.00]
; SKX-NEXT: pushw $4095 # imm = 0xFFF
; SKX-NEXT: # sched: [1:1.00]
; SKX-NEXT: pushw $7 # sched: [1:1.00]
@@ -1820,9 +1820,9 @@ define i32 @test_pop_push_32(i32 %a0, i3
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; HASWELL-NEXT: #APP
; HASWELL-NEXT: popl %eax # sched: [6:0.50]
-; HASWELL-NEXT: popl (%ecx) # sched: [1:1.00]
+; HASWELL-NEXT: popl (%ecx) # sched: [7:1.00]
; HASWELL-NEXT: pushl %eax # sched: [2:1.00]
-; HASWELL-NEXT: pushl (%ecx) # sched: [1:1.00]
+; HASWELL-NEXT: pushl (%ecx) # sched: [7:1.00]
; HASWELL-NEXT: pushl $4095 # imm = 0xFFF
; HASWELL-NEXT: # sched: [1:1.00]
; HASWELL-NEXT: pushl $7 # sched: [1:1.00]
@@ -1835,9 +1835,9 @@ define i32 @test_pop_push_32(i32 %a0, i3
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: popl %eax # sched: [6:0.50]
-; BROADWELL-NEXT: popl (%ecx) # sched: [6:0.50]
+; BROADWELL-NEXT: popl (%ecx) # sched: [6:1.00]
; BROADWELL-NEXT: pushl %eax # sched: [2:1.00]
-; BROADWELL-NEXT: pushl (%ecx) # sched: [2:1.00]
+; BROADWELL-NEXT: pushl (%ecx) # sched: [6:1.00]
; BROADWELL-NEXT: pushl $4095 # imm = 0xFFF
; BROADWELL-NEXT: # sched: [1:1.00]
; BROADWELL-NEXT: pushl $7 # sched: [1:1.00]
@@ -1850,9 +1850,9 @@ define i32 @test_pop_push_32(i32 %a0, i3
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: popl %eax # sched: [6:0.50]
-; SKYLAKE-NEXT: popl (%ecx) # sched: [6:0.50]
+; SKYLAKE-NEXT: popl (%ecx) # sched: [6:1.00]
; SKYLAKE-NEXT: pushl %eax # sched: [2:1.00]
-; SKYLAKE-NEXT: pushl (%ecx) # sched: [2:1.00]
+; SKYLAKE-NEXT: pushl (%ecx) # sched: [6:1.00]
; SKYLAKE-NEXT: pushl $4095 # imm = 0xFFF
; SKYLAKE-NEXT: # sched: [1:1.00]
; SKYLAKE-NEXT: pushl $7 # sched: [1:1.00]
@@ -1865,9 +1865,9 @@ define i32 @test_pop_push_32(i32 %a0, i3
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
; SKX-NEXT: popl %eax # sched: [6:0.50]
-; SKX-NEXT: popl (%ecx) # sched: [6:0.50]
+; SKX-NEXT: popl (%ecx) # sched: [6:1.00]
; SKX-NEXT: pushl %eax # sched: [2:1.00]
-; SKX-NEXT: pushl (%ecx) # sched: [2:1.00]
+; SKX-NEXT: pushl (%ecx) # sched: [6:1.00]
; SKX-NEXT: pushl $4095 # imm = 0xFFF
; SKX-NEXT: # sched: [1:1.00]
; SKX-NEXT: pushl $7 # sched: [1:1.00]
Modified: llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll Sun Mar 18 01:38:06 2018
@@ -7605,8 +7605,8 @@ define void @test_loop() optsize {
; HASWELL-NEXT: #APP
; HASWELL-NEXT: LTGT:
; HASWELL-NEXT: loop LTGT # sched: [7:2.00]
-; HASWELL-NEXT: loope LTGT # sched: [7:2.00]
-; HASWELL-NEXT: loopne LTGT # sched: [7:2.00]
+; HASWELL-NEXT: loope LTGT # sched: [11:2.75]
+; HASWELL-NEXT: loopne LTGT # sched: [11:2.75]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retq # sched: [7:1.00]
;
@@ -7615,8 +7615,8 @@ define void @test_loop() optsize {
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: LTGT:
; BROADWELL-NEXT: loop LTGT # sched: [7:2.00]
-; BROADWELL-NEXT: loope LTGT # sched: [7:2.00]
-; BROADWELL-NEXT: loopne LTGT # sched: [7:2.00]
+; BROADWELL-NEXT: loope LTGT # sched: [11:2.75]
+; BROADWELL-NEXT: loopne LTGT # sched: [11:2.75]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
@@ -7625,8 +7625,8 @@ define void @test_loop() optsize {
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: LTGT:
; SKYLAKE-NEXT: loop LTGT # sched: [7:2.00]
-; SKYLAKE-NEXT: loope LTGT # sched: [7:2.00]
-; SKYLAKE-NEXT: loopne LTGT # sched: [7:2.00]
+; SKYLAKE-NEXT: loope LTGT # sched: [11:2.75]
+; SKYLAKE-NEXT: loopne LTGT # sched: [11:2.75]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
@@ -7635,8 +7635,8 @@ define void @test_loop() optsize {
; SKX-NEXT: #APP
; SKX-NEXT: LTGT:
; SKX-NEXT: loop LTGT # sched: [7:2.00]
-; SKX-NEXT: loope LTGT # sched: [7:2.00]
-; SKX-NEXT: loopne LTGT # sched: [7:2.00]
+; SKX-NEXT: loope LTGT # sched: [11:2.75]
+; SKX-NEXT: loopne LTGT # sched: [11:2.75]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retq # sched: [7:1.00]
;
@@ -9674,9 +9674,9 @@ define i16 @test_pop_push_16(i16 %a0, i1
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: popw %ax # sched: [6:0.50]
-; HASWELL-NEXT: popw (%rsi) # sched: [1:1.00]
+; HASWELL-NEXT: popw (%rsi) # sched: [7:1.00]
; HASWELL-NEXT: pushw %di # sched: [2:1.00]
-; HASWELL-NEXT: pushw (%rsi) # sched: [1:1.00]
+; HASWELL-NEXT: pushw (%rsi) # sched: [7:1.00]
; HASWELL-NEXT: pushw $4095 # imm = 0xFFF
; HASWELL-NEXT: # sched: [1:1.00]
; HASWELL-NEXT: pushw $7 # sched: [1:1.00]
@@ -9687,9 +9687,9 @@ define i16 @test_pop_push_16(i16 %a0, i1
; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: popw %ax # sched: [6:0.50]
-; BROADWELL-NEXT: popw (%rsi) # sched: [6:0.50]
+; BROADWELL-NEXT: popw (%rsi) # sched: [6:1.00]
; BROADWELL-NEXT: pushw %di # sched: [2:1.00]
-; BROADWELL-NEXT: pushw (%rsi) # sched: [2:1.00]
+; BROADWELL-NEXT: pushw (%rsi) # sched: [6:1.00]
; BROADWELL-NEXT: pushw $4095 # imm = 0xFFF
; BROADWELL-NEXT: # sched: [1:1.00]
; BROADWELL-NEXT: pushw $7 # sched: [1:1.00]
@@ -9700,9 +9700,9 @@ define i16 @test_pop_push_16(i16 %a0, i1
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: popw %ax # sched: [6:0.50]
-; SKYLAKE-NEXT: popw (%rsi) # sched: [6:0.50]
+; SKYLAKE-NEXT: popw (%rsi) # sched: [6:1.00]
; SKYLAKE-NEXT: pushw %di # sched: [2:1.00]
-; SKYLAKE-NEXT: pushw (%rsi) # sched: [2:1.00]
+; SKYLAKE-NEXT: pushw (%rsi) # sched: [6:1.00]
; SKYLAKE-NEXT: pushw $4095 # imm = 0xFFF
; SKYLAKE-NEXT: # sched: [1:1.00]
; SKYLAKE-NEXT: pushw $7 # sched: [1:1.00]
@@ -9713,9 +9713,9 @@ define i16 @test_pop_push_16(i16 %a0, i1
; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: popw %ax # sched: [6:0.50]
-; SKX-NEXT: popw (%rsi) # sched: [6:0.50]
+; SKX-NEXT: popw (%rsi) # sched: [6:1.00]
; SKX-NEXT: pushw %di # sched: [2:1.00]
-; SKX-NEXT: pushw (%rsi) # sched: [2:1.00]
+; SKX-NEXT: pushw (%rsi) # sched: [6:1.00]
; SKX-NEXT: pushw $4095 # imm = 0xFFF
; SKX-NEXT: # sched: [1:1.00]
; SKX-NEXT: pushw $7 # sched: [1:1.00]
@@ -9807,9 +9807,9 @@ define i64 @test_pop_push_64(i64 %a0, i6
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: popq %rax # sched: [6:0.50]
-; HASWELL-NEXT: popq (%rsi) # sched: [6:0.50]
+; HASWELL-NEXT: popq (%rsi) # sched: [7:1.00]
; HASWELL-NEXT: pushq %rdi # sched: [2:1.00]
-; HASWELL-NEXT: pushq (%rsi) # sched: [2:1.00]
+; HASWELL-NEXT: pushq (%rsi) # sched: [7:1.00]
; HASWELL-NEXT: pushq $4095 # imm = 0xFFF
; HASWELL-NEXT: # sched: [1:1.00]
; HASWELL-NEXT: pushq $7 # sched: [2:1.00]
@@ -9820,9 +9820,9 @@ define i64 @test_pop_push_64(i64 %a0, i6
; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: popq %rax # sched: [6:0.50]
-; BROADWELL-NEXT: popq (%rsi) # sched: [6:0.50]
+; BROADWELL-NEXT: popq (%rsi) # sched: [6:1.00]
; BROADWELL-NEXT: pushq %rdi # sched: [2:1.00]
-; BROADWELL-NEXT: pushq (%rsi) # sched: [2:1.00]
+; BROADWELL-NEXT: pushq (%rsi) # sched: [6:1.00]
; BROADWELL-NEXT: pushq $4095 # imm = 0xFFF
; BROADWELL-NEXT: # sched: [1:1.00]
; BROADWELL-NEXT: pushq $7 # sched: [2:1.00]
@@ -9833,9 +9833,9 @@ define i64 @test_pop_push_64(i64 %a0, i6
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: popq %rax # sched: [6:0.50]
-; SKYLAKE-NEXT: popq (%rsi) # sched: [6:0.50]
+; SKYLAKE-NEXT: popq (%rsi) # sched: [6:1.00]
; SKYLAKE-NEXT: pushq %rdi # sched: [2:1.00]
-; SKYLAKE-NEXT: pushq (%rsi) # sched: [2:1.00]
+; SKYLAKE-NEXT: pushq (%rsi) # sched: [6:1.00]
; SKYLAKE-NEXT: pushq $4095 # imm = 0xFFF
; SKYLAKE-NEXT: # sched: [1:1.00]
; SKYLAKE-NEXT: pushq $7 # sched: [2:1.00]
@@ -9846,9 +9846,9 @@ define i64 @test_pop_push_64(i64 %a0, i6
; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: popq %rax # sched: [6:0.50]
-; SKX-NEXT: popq (%rsi) # sched: [6:0.50]
+; SKX-NEXT: popq (%rsi) # sched: [6:1.00]
; SKX-NEXT: pushq %rdi # sched: [2:1.00]
-; SKX-NEXT: pushq (%rsi) # sched: [2:1.00]
+; SKX-NEXT: pushq (%rsi) # sched: [6:1.00]
; SKX-NEXT: pushq $4095 # imm = 0xFFF
; SKX-NEXT: # sched: [1:1.00]
; SKX-NEXT: pushq $7 # sched: [2:1.00]
@@ -10896,7 +10896,7 @@ define void @test_rdtsc_rdtscp() optsize
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: rdtsc # sched: [18:2.00]
-; HASWELL-NEXT: rdtscp # sched: [18:2.00]
+; HASWELL-NEXT: rdtscp # sched: [42:5.50]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retq # sched: [7:1.00]
;
@@ -10904,7 +10904,7 @@ define void @test_rdtsc_rdtscp() optsize
; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: rdtsc # sched: [18:2.00]
-; BROADWELL-NEXT: rdtscp # sched: [18:2.00]
+; BROADWELL-NEXT: rdtscp # sched: [42:5.50]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
@@ -10912,7 +10912,7 @@ define void @test_rdtsc_rdtscp() optsize
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: rdtsc # sched: [18:2.00]
-; SKYLAKE-NEXT: rdtscp # sched: [18:2.00]
+; SKYLAKE-NEXT: rdtscp # sched: [42:5.50]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
@@ -10920,7 +10920,7 @@ define void @test_rdtsc_rdtscp() optsize
; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: rdtsc # sched: [18:2.00]
-; SKX-NEXT: rdtscp # sched: [18:2.00]
+; SKX-NEXT: rdtscp # sched: [42:5.50]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retq # sched: [7:1.00]
;
Modified: llvm/trunk/test/CodeGen/X86/x87-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x87-schedule.ll?rev=327787&r1=327786&r2=327787&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x87-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x87-schedule.ll Sun Mar 18 01:38:06 2018
@@ -611,8 +611,8 @@ define void @test_fclex() optsize {
; HASWELL-LABEL: test_fclex:
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
-; HASWELL-NEXT: wait # sched: [1:0.50]
-; HASWELL-NEXT: fnclex # sched: [1:1.25]
+; HASWELL-NEXT: wait # sched: [2:0.50]
+; HASWELL-NEXT: fnclex # sched: [4:1.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [7:1.00]
;
@@ -691,7 +691,7 @@ define void @test_fnclex() optsize {
; HASWELL-LABEL: test_fnclex:
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fnclex # sched: [1:1.25]
+; HASWELL-NEXT: fnclex # sched: [4:1.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [7:1.00]
;
@@ -2295,8 +2295,8 @@ define void @test_finit() optsize {
; HASWELL-LABEL: test_finit:
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
-; HASWELL-NEXT: wait # sched: [1:0.50]
-; HASWELL-NEXT: fninit # sched: [1:?]
+; HASWELL-NEXT: wait # sched: [2:0.50]
+; HASWELL-NEXT: fninit # sched: [75:6.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [7:1.00]
;
@@ -2375,7 +2375,7 @@ define void @test_fninit() optsize {
; HASWELL-LABEL: test_fninit:
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fninit # sched: [1:?]
+; HASWELL-NEXT: fninit # sched: [75:6.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [7:1.00]
;
@@ -3376,7 +3376,7 @@ define void @test_fprem_fprem1() optsize
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fprem # sched: [19:?]
-; HASWELL-NEXT: fprem1 # sched: [19:?]
+; HASWELL-NEXT: fprem1 # sched: [27:?]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [7:1.00]
;
@@ -3696,7 +3696,7 @@ define void @test_fsave(i8* %a0) optsize
; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; HASWELL-NEXT: #APP
-; HASWELL-NEXT: wait # sched: [1:0.50]
+; HASWELL-NEXT: wait # sched: [2:0.50]
; HASWELL-NEXT: fnsave (%eax) # sched: [1:?]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [7:1.00]
@@ -4350,11 +4350,11 @@ define void @test_fstcw_fstenv_fstsw(i8*
; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; HASWELL-NEXT: #APP
-; HASWELL-NEXT: wait # sched: [1:0.50]
+; HASWELL-NEXT: wait # sched: [2:0.50]
; HASWELL-NEXT: fnstcw (%eax) # sched: [2:1.00]
-; HASWELL-NEXT: wait # sched: [1:0.50]
+; HASWELL-NEXT: wait # sched: [2:0.50]
; HASWELL-NEXT: fnstenv (%eax) # sched: [115:19.50]
-; HASWELL-NEXT: wait # sched: [1:0.50]
+; HASWELL-NEXT: wait # sched: [2:0.50]
; HASWELL-NEXT: fnstsw (%eax) # sched: [4:1.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [7:1.00]
@@ -5331,7 +5331,7 @@ define void @test_fwait() optsize {
; HASWELL-LABEL: test_fwait:
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
-; HASWELL-NEXT: wait # sched: [1:0.50]
+; HASWELL-NEXT: wait # sched: [2:0.50]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [7:1.00]
;
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