[PATCH] D43876: [LoopUnroll] Peel off iterations if it makes conditions true/false.
Florian Hahn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 14 12:57:25 PDT 2018
fhahn added inline comments.
================
Comment at: lib/Transforms/Utils/LoopUnrollPeel.cpp:182
+ continue;
+ } else if (isa<SCEVAddRecExpr>(RightSCEV))
+ continue;
----------------
mkazantsev wrote:
> Why do we bail if both left and right are AddRecs? What is the problem?
>
> If there are no conceptual troubles with handling this case, I'd rather handle it. And if so, please add a corresponding test.
I don't think there are conceptual problems, although it will make things slightly more complicated; I think we would need some more checks and also evaluate the second AR, if we have one. I have test case, but I would prefer to add that in a follow up patch, if that is ok with you?
https://reviews.llvm.org/D43876
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