[llvm] r327518 - [CodeGen] allow printing of zero latency in sched comments

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed Mar 14 08:28:48 2018
New Revision: 327518

URL: http://llvm.org/viewvc/llvm-project?rev=327518&view=rev
Log:
[CodeGen] allow printing of zero latency in sched comments

I don't know how to expose this in a test. There are ARM / AArch64 
sched classes that include zero latency instructions, but I'm not 
seeing sched info printed for those targets. X86 will almost 
certainly have these soon (see PR36671), but no model has
'let Latency = 0' currently.

Modified:
    llvm/trunk/lib/CodeGen/TargetSubtargetInfo.cpp

Modified: llvm/trunk/lib/CodeGen/TargetSubtargetInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetSubtargetInfo.cpp?rev=327518&r1=327517&r2=327518&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TargetSubtargetInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetSubtargetInfo.cpp Wed Mar 14 08:28:48 2018
@@ -68,17 +68,15 @@ bool TargetSubtargetInfo::useAA() const
 }
 
 static std::string createSchedInfoStr(unsigned Latency,
-                                     Optional<double> RThroughput) {
+                                      Optional<double> RThroughput) {
   static const char *SchedPrefix = " sched: [";
   std::string Comment;
   raw_string_ostream CS(Comment);
-  if (Latency > 0 && RThroughput.hasValue())
+  if (RThroughput.hasValue())
     CS << SchedPrefix << Latency << format(":%2.2f", RThroughput.getValue())
        << "]";
-  else if (Latency > 0)
+  else
     CS << SchedPrefix << Latency << ":?]";
-  else if (RThroughput.hasValue())
-    CS << SchedPrefix << "?:" << RThroughput.getValue() << "]";
   CS.flush();
   return Comment;
 }