[PATCH] D43876: [LoopUnroll] Peel off iterations if it makes conditions true/false.
Max Kazantsev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 13 21:36:37 PDT 2018
mkazantsev added inline comments.
================
Comment at: lib/Transforms/Utils/LoopUnrollPeel.cpp:182
+ continue;
+ } else if (isa<SCEVAddRecExpr>(RightSCEV))
+ continue;
----------------
Why do we bail if both left and right are AddRecs? What is the problem?
If there are no conceptual troubles with handling this case, I'd rather handle it. And if so, please add a corresponding test.
https://reviews.llvm.org/D43876
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